S32k324 rx can id Masking and filtering

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S32k324 rx can id Masking and filtering

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Prasad_330
Contributor II

Hi,

I am using the S32k324 controller.

I am not able filter the required can id, instead i am receiving all the can id.

can id that i wanted to receive are 0x001, 0x101,and 0x111.

for which Mask is 0x6EF and Filter is 0x001.

The snap  of the CAN  initialization is attached.

Plz help me out

Prasad_330_0-1708939120301.png

 

 

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Prasad_330
Contributor II

hi Julian_AragonM,

Thanks for reply.

I tried to configure s32k324 by referring to your reference code.

But in the configuration tool i am not able select  some options  can plz help me out.

I have also attached the screen shot of the configuration of flex can.

Prasad_330_0-1709623551863.png

 

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Julián_AragónM
NXP TechSupport
NXP TechSupport

Hi @Prasad_330,

DMA option is only available when Legacy or Enhanced Rx FIFO is enabled:

Julin_AragnM_0-1709677754588.pngJulin_AragnM_1-1709677764159.pngJulin_AragnM_2-1709677793466.png

As for the enhanced Rx FIFO, not every instance supports this feature, please refer to Table 476. FlexCAN configuration and instances of the S32K3 Reference Manual for more information for chip specific FlexCAN information.

Best regards,
Julián

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Julián_AragónM
NXP TechSupport
NXP TechSupport

Hi @Prasad_330

Matching to a range of IDs is possible by using ID acceptance masks. FlexCAN supports individual masking per MB (IRMQ bit set) or global masking scheme (IRMQ cleared). During the matching algorithm, if a mask bit of mask register is asserted, then the corresponding received ID bit is compared with the ID bit defined in the MB or RXFIFO filter table. If the mask bit is negated, the corresponding ID bit is a "don't care".

Please check the following community post: Example S32K344 FlexCAN_Ip TX/RX/EnhanceRXFIFO test S32DS3.4 RTD200 - NXP Community

Best regards,
Julián

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