S32K344 Cs to Cs time issue in SPI

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S32K344 Cs to Cs time issue in SPI

890件の閲覧回数
shrikantkoli1995
Contributor I

Hi Team,

I am working with s32k344 series.

I am sending 4 bytes of two frame in 1ms task . getting 66 uSec delay between two frame.

shrikantkoli1995_0-1687771858882.png

In tresos i have configure Cs to Cs time is 1uSec.

shrikantkoli1995_2-1687772420264.png

 

in code i have send two consecutive frame .

shrikantkoli1995_1-1687772186264.png

 

please suggest somewhere i am doing wrong setting.

Regards,

Shrikant Koli

 

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7 返答(返信)

869件の閲覧回数
danielmartynek
NXP TechSupport
NXP TechSupport

Hi @shrikantkoli1995,

This is caused by the cpu overhead, you should see a shorter delay at a higher system clock frequency.

The driver needs some time to place the data into the TX FIFO.

If you sent all 8 bytes in one function call, the delay should not be there.

 

Regards,

Daniel

 

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850件の閲覧回数
shrikantkoli1995
Contributor I

Hello danielmartynek,

Thanks for your support.

As you mention we tried this solution, instead of 8 we are sending 4 bytes in a one function call. before that we are sending 2 bytes in a one function call.

But whenever we called this function for next 4 bytes that time we get delay.

Additional information is that we are using internal buffer.

Regards,

Shrikant 

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827件の閲覧回数
danielmartynek
NXP TechSupport
NXP TechSupport

HI @shrikantkoli1995,

I not sure how exactly is the driver implemented.

But the LPSPI module keeps sending as long as there are data in the TX FIFO.

With the DMA, there should be no CPU overhead.

 

Regards,

Daniel

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759件の閲覧回数
shrikantkoli1995
Contributor I

Hi @danielmartynek 

Please refer the our new configuration, this configuration we slightly modified.

Attached tresos configuration for your reference.

shrikantkoli1995_0-1688710627141.png

Chip select pin is active low and CS2CS time configures as 3uSec.

SPI reference clock set to be 30M.

look at the attached result .  

shrikantkoli1995_1-1688711047757.png

In one frame we are transmitting the 2 bytes data.

Cs2Cs time is configured as a 3uSec but in image if you see that is approximate 44uSec.

We have check all the register setting that is correct as per configuration.

why the configuration  made by the tresos does not have any impact on behavior.

Look at the below code : send function.

shrikantkoli1995_2-1688711905048.png

 

referring to the link : Re: How to Change SPI Data time interval With MCAL - NXP Community

same issue is happen with other users. NXP provided them workaround.

if possible provide this workaround to us. so we can try it out.

Regards,
Shrikant

 

 

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741件の閲覧回数
cuongnguyenphu
NXP Employee
NXP Employee

Can you send me the full configurations of your project via your case number 00546814
And how did you call your Send function in your project?

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703件の閲覧回数
shrikantkoli1995
Contributor I

Hi @cuongnguyenphu ,

I have attached here SPI related xdm files.

i have called this function cyclically into the 1 ms scheduler.

Meanwhile guide me how i can share the configuration through case number 00546814.

Regards,

Shrikant 

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686件の閲覧回数
cuongnguyenphu
NXP Employee
NXP Employee

@shrikantkoli1995
You can access to https://support.nxp.com/ by your account, in Cases tab you can find a ticket number linked to this topic, then you can send to us some private information of your project that cannot share on this community

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