S32K312 PWM output jamming problem

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S32K312 PWM output jamming problem

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jack_huang1
Contributor III

Dears,

         When debugging S32K312, when using PWM output function, we found that PWM output card lag would occur when the PWM output period or duty cycle was changed through the software interface, as shown in the following figure1:

          Specific parameters are described as follows:
· Chip model: S32K312
·PWM hardware channel PTB18 CH1_15_H
·PWM mode: DAOC
·MCAL clock frequency division 200, bus frequency division DIV_10

           Problem description: Because the PWM period required to output is small, this requires that the clock frequency dividing parameter must be set to large. However, we found that when the clock frequency division parameter is set to a large, this card lag problem will occur.
The larger the setting of the frequency division parameter, the longer the delay time after the PWM period or duty cycle is modified, and the same parameters as the current setting will also cause this situation.
         Clock frequency division parameters are shown in the figure2 and  figure3 below:

          

           Thank you!

              Best regards!

 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello @jack_huang1,

What is the required PWM frequency and duty cycle?

Why did you choose the DAOC eMIOS mode?

 

Thank you,

BR, Daniel

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jack_huang1
Contributor III

Dear;

         

Q:What is the required PWM frequency and duty cycle?

A: The customer used NXP S32K312 solution to make a coprocessor for a smart cabin product. The customer needs to use PWM to achieve the output requirement of 1Hz, and the frequency is transmitted to GPS as an auxiliary positioning. Duty cycle is 50%.

Q:Why did you choose the DAOC eMIOS mode?

A: Because OPWMB, OPWMCB, OPWMT and other modes do not support variable cycles, that is, the cycle cannot be changed during the running of the program. OPWFMB mode can only use the internal clock, the frequency division is up to 16, and the PWM output cannot meet our frequency range needs.

 

           FYI!

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danielmartynek
NXP TechSupport
NXP TechSupport

Dear @jack_huang1,

Although the PWM driver cannot change the period of the PWM in the OPWMB, OPWMCB, OPWMT modes, the period of the counter bus that clocks the PWM channel and defines the period of the PWM signal and can be changed.

 

Regards,

Daniel

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