S32K3_SPI_CS problem, when using GPIO to simulate CS

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S32K3_SPI_CS problem, when using GPIO to simulate CS

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wuxianlong
Contributor III

Hi, all

  When I used GPIO to simulate spi's CS, the data was wrong.Can you give me some help?
 

   In RTD2.0.0,  Lpspi_Ip_AsyncTransmit() calls Lpspi_TransmitTxInit() to initialize the transmission clock and reset. If the (CPOL = 1) mode is used, a low level pulse is generated each time on the SCK. If I use GPIO to simulate the CS pin of the chip, it will be interfered by this low pulse, resulting in abnormal data.

1.png2.png

BRs.

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VaneB
NXP TechSupport
NXP TechSupport

Hi @wuxianlong

As seen in the Lpspi_TransmitTxInit function, it is necessary to reset all the registers due to errata ERR050456. As you saw, this is generating the low pulse that is interfering.
What I suggest is that you modify this function and send the CS after the reset to ensure that does not interfere with the data.

 

B.R.

VaneB 

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VaneB
NXP TechSupport
NXP TechSupport

Hi @wuxianlong

As seen in the Lpspi_TransmitTxInit function, it is necessary to reset all the registers due to errata ERR050456. As you saw, this is generating the low pulse that is interfering.
What I suggest is that you modify this function and send the CS after the reset to ensure that does not interfere with the data.

 

B.R.

VaneB 

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S3RD4R
Contributor I

 

I am also using GPIO to simulate CS. I am trying to communicate with an external flash which has a flow chart of:

1 - Write command

2 - Read response

during which CS should be low. However, it is impossible in this case since in second step inevitably an extra pulse will be sent. 

Is there any workaround for this case?

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NemoZhang
Contributor I

I'm facing the same problem as you. Could you please tell me how you managed to resolve it?

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