S32K148 - ENET 1588 Timer issue

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S32K148 - ENET 1588 Timer issue

1,677件の閲覧回数
jakub_mielczare
Contributor III

Hello,

In my application I'm using S32K148 ENET 1588 Timer in output compare mode with toggle output on compare. It is used for AVB media clock recovery. DMA is writing timestamps from a FIFO to timer's TCCR register.

I'm facing a rare issue that sometimes the DMA stops consuming timestamps and the value of TCCR register shows a timestamp which should have been consumed, but was not. The value of the timestamp read from TCCR is around 500000.

Is there a known issue with this MCU which could lead to the described problem?

The same happens (also very rare) when DMA is not used at all for writing timestamps to TCCR, but ENET 1588 Timer interrupts are used instead with MCU writes to TCCR in the interrupts.

If the TCCR register reading in this case returns 500000 value of timestamp, does it mean that prevoous written timestamp was not consumed, or that 500000 was not consumed? I'm asking as the S32K148 manual says the TCCR is double buffered.

My timestamp interval is nominal 500000 ns. ENET clock is 40MHz.

 

Best regards,

Jakub

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6 返答(返信)

1,666件の閲覧回数
jakub_mielczare
Contributor III

Hello,

It appears that ENET 1588 Timer stops consuming timestamps, when timestamp is in range 999 999 975 to 25 ns, when IEEE 1588 time crosses 0.

Can you confirm this?

Best regards,

Jakub

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1,661件の閲覧回数
PetrS
NXP TechSupport
NXP TechSupport

Hi,

 

does it mean you see missing output toggle (flag is not set too) on counter overflow? By the TCCR register reading you have no indication that update was done. An update is done whenever the timer channel is enabled and on every subsequent compare. Also a compare should occurs on overflow if compare value is greater that counter when counter overflows or a compare value is less that counter after overflow.

 

Br, Petr

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1,614件の閲覧回数
jakub_mielczare
Contributor III

Hi Petr,

Is there any update on this issue?

Best regards,

Jakub

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1,659件の閲覧回数
jakub_mielczare
Contributor III

Hi,

I see that IRQ (when TCCR is written by CPU in interrupts) and DMA (when DMA is writing to TCCR) stop at specific TCCR values. It looks like when the written TCCR value is in range 999999975-0. I think 20 or 10 do not cause the issue, but I will double check. My ENET 1588 counter period is 25ns.

When timer stops, the toggling also stops and there are no more irqs nor dma transfers. I need to reset the timer to make it running and toggling again.

Regards,

Jakub

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1,657件の閲覧回数
jakub_mielczare
Contributor III

It also depends what is the initial value of 1588 Time set. If I set it to 24 and my first timestamp is 24+9000000 and increment the timestamps by 500000, then it also stops at 24.

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1,654件の閲覧回数
jakub_mielczare
Contributor III

If I set the first timestamp in TCCR to 999999990ULL then the compare interrupt does not get fired at all.

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