S32K144 USES FTM0 to output two-channel PWM and compares the output.To calculate the waveform by interruption, use CH0 to interrupt.but never can enter interrupt.

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S32K144 USES FTM0 to output two-channel PWM and compares the output.To calculate the waveform by interruption, use CH0 to interrupt.but never can enter interrupt.

838 次查看
1751640975
Contributor I

S32K144 USES FTM0 to output two-channel PWM and compares the output.To calculate the waveform by interruption, use CH0 to interrupt.

Case:PWM always has output, but never can enter interrupt.

 

Analysis: 1. Is it configured incorrectly?

               2. Wrong interrupt service function?

 

int main(void)

{

WDOG_disable(); /* Disable WatchDog */
SOSC_init_8MHz(); /* Initialize system oscillator for 8 MHz xtal */

SPLL_init_160MHz(); /* Initialize SPLL to 160 MHz with 8 MHz SOSC */
NormalRUNmode_40MHz(); /* Init clocks: 80 MHz sysclk & core, 40 MHz bus, 20 MHz flash */

 FTM0_NVIC_init_IRQs();
FTM0_init_40MHZ(); /* Init FTM0 in 40MHZ*/

PORT_init(); /* Configure ports */
FTM0_CH0_init(); /* Init FTM0 CH0 */
FTM0_CH1_init(); /* Init FTM0 CH1 */
for(;;)
{
/* Do nothing */
}

}

 

void FTM0_Ch0_Ch1_IRQHandler (void)
{
if(count<1000)
{
count++;

if(count==128)
{
FTM0->SC &= ~(FTM_SC_PWMEN1_MASK | FTM_SC_PWMEN0_MASK);
count = 0;
}
}
FTM0->CONTROLS[0].CnSC &= ~FTM_CnSC_CHF_MASK;
}

 

void PORT_init(void)
{
/*PWM0--FTM0*/
PCC->PCCn[PCC_PORTD_INDEX ]|=PCC_PCCn_CGC_MASK; /* Enable clock for PORTD */
PORTD->PCR[15]|=PORT_PCR_MUX(2); /* Port D15: MUX = ALT2 CH0*/
PORTD->PCR[16]|=PORT_PCR_MUX(2); /* Port D15: MUX = ALT2 CH1*/
//PTD->PDDR |= 1<<15; /* Port D0: Data Direction= output */
//PORTD->PCR[15] = 0x00000100; /* Port D0: MUX = GPIO */
//PTD-> PDOR |= 1<<15;
}

 

 

void FTM0_init_40MHZ(void)
{
PCC->PCCn[PCC_FTM0_INDEX] &= ~PCC_PCCn_CGC_MASK; /* Ensure clk disabled for config */
PCC->PCCn[PCC_FTM0_INDEX] |= PCC_PCCn_PCS(0) | PCC_PCCn_CGC_MASK;
/* Clock is off */
/* Enable clock for FTM regs */
FTM0->MODE |= FTM_MODE_WPDIS_MASK; /* Write protect to registers disabled (default) */
FTM0->MODE |= FTM_MODE_FTMEN_MASK; /* Enable write the FTM CnV register */
FTM0->SC = 0;
FTM0->CNTIN = 0;
FTM0->SC |= FTM_SC_PWMEN1_MASK | FTM_SC_PWMEN0_MASK | FTM_SC_PS(0);/**/
/* Enable PWM channel 0,1 output*/
/* TOIE (Timer Overflow Interrupt Ena) = 0 (default) */
/* CPWMS (Center aligned PWM Select) = 0 (default, up count) */
/* CLKS (Clock source) = 0 (default, no clock; FTM disabled) */
/* PS (Prescaler factor) = 0. Prescaler = 1 */
FTM0->COMBINE = 0x00000000;/* FTM mode settings used: DECAPENx, MCOMBINEx, COMBINEx=0 */
FTM0->POL = 0x00000000; /* Polarity for all channels is active high (default) */
FTM0->MOD = 160 -1 ; /* FTM1 counter final value (used for PWM mode) */
/* FTM1 Period = MOD-CNTIN+0x0001 ~= 2 ctr clks */
/* 40MHz / 1 = 40MHz 1/40MHZ = 0.025us */
//FTM0->SC |= FTM_SC_CPWMS_MASK;
}

 

void FTM0_CH0_init(void)
{
FTM0->CONTROLS[0].CnSC |= FTM_CnSC_MSA_MASK | FTM_CnSC_CHIE_MASK | FTM_CnSC_ELSA_MASK ; //0x00000054;//设置为输出比较 中断使能

FTM0->CONTROLS[0].CnSC &= ~FTM_CnSC_CHF_MASK;

FTM0->CONTROLS[0].CnV = 10;
}

void FTM0_CH1_init(void)
{
FTM0->CONTROLS[1].CnSC |= FTM_CnSC_MSA_MASK | FTM_CnSC_ELSA_MASK;//设置为输出比较

FTM0->CONTROLS[1].CnV = 30;
}

 

void start_FTM0_counter(char clock_Selection)
{
FTM0->SC |= FTM_SC_CLKS(clock_Selection); //
/* Start FTM0 counter with clk source = FTM System clock*/
}

void FTM0_NVIC_init_IRQs (void)
{
S32_NVIC->ICPR[1] = 1 << (99 % 32); /* IRQ99-FTM0 ch0: clr any pending IRQ*/
S32_NVIC->ISER[1] = 1 << (99 % 32); /* IRQ99-FTM0 ch0: enable IRQ */
S32_NVIC->IP[99] = 0x9; /* IRQ99-FTM0 ch0: priority 10 of 0-15*/
}

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595 次查看
brucebowling
Contributor I

Sorry to hijack this thread, but I am trying to accomplish a similar thing but with FTM2 channel 0. Trying to set up interrupts for an output compare operation but not getting very far and I apparently don't have a good handle on the NVIC setup. This is the code I am using to set up the NVIC, which I see the format used everywhere:

    S32_NVIC->ICPR[111 / 32] = 1 << (111 % 32);
    S32_NVIC->ISER[111 / 32] = (1 << (111 % 32)); // enable interrupt
    S32_NVIC->IP[111] = 0xA0; // priority 10 of 0-15

Not receiving the interrupt, I want to verify that I have the NVIC set up properly for FTM2 channel 0.

Here are my questions:

1) What is the fastest way to determine the interrupt vector number for a particular peripheral? I *believe* it is 111 but I am not 100% sure. I am missing documentation/table listing interrupt vector numbers. I see the list of interrupt vectors in startup_S32K144.s file but its not easy to determine actual vector number by counting....

2) How do I determine the NVIC non-IPR register number? I looked in the attached spreadsheets as per manual section 7.2.3 says to do, but I do not see the nice chart listing the address, vector, irq, etc that they show in the manual section. I am sure I am missing where these are located?

3) In all of the examples I see the index being computed by the vector number divided by 32 - this is what I did above with the [111 / 32] but I am not 100% sure what this does. Same with the modulus operation (111 % 32), again it appears magical to me how this works, and does it always work for all vectors?

Sorry for the questions, general keyword searches in the manual and the internet is not getting me very far.

- Bruce

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595 次查看
danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

The NVIC non-IPR register number is 3 for the FTM0_ch0_ch1 interrupt.

pastedImage_1.png

It should be:

void FTM0_NVIC_init_IRQs (void)
{
S32_NVIC->ICPR[3] = 1 << (99 % 32); /* IRQ99-FTM0 ch0: clr any pending IRQ*/
S32_NVIC->ISER[3] = 1 << (99 % 32); /* IRQ99-FTM0 ch0: enable IRQ */
S32_NVIC->IP[99] = 0x90; /* IRQ99-FTM0 ch0: priority 10 of 0-15*/
}

Also, the priority number needs to be in the 4 MSB of IP[n].

Regards,

Daniel

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