S32K144: GPIO input voltage thresholds for logical HIGH and LOW?

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

S32K144: GPIO input voltage thresholds for logical HIGH and LOW?

ソリューションへジャンプ
2,332件の閲覧回数
kpatil
Contributor II

I am a little confused about the GPIO input voltage thresholds for logical HIGH and LOW.

In S32K-DS datasheet, Section 5.3 DC electrical specifications at 3.3 V Range, it suggests:

pastedImage_4.png

After resolving that, the high low zones look like.

pastedImage_3.png

My confusion lies here. There is this band that seems to be either undefined or I am not able to fully understand the table.

Further, I had the following observations while testing voltage on an input pin on our custom board:

Config: The pin has an external 3V3 pull up and some intermediate circuit with voltage drop. 

1. When internal pin pull is OFF.

      - The voltage at pin is between ~1.65V - 2.0 V and it reads it as LOW (mostly, but not always).

2. When internal pin pull is PULL UP.

      - The voltage at pin is ~1.85V - 2 V and it always reads it as HIGH.

The two voltage ranges lie in the unknown band I mentioned above so I am not really sure what to expect of it.

Any help is appreciated.

Thanks!

- Kedar

ラベル(1)
タグ(2)
0 件の賞賛
1 解決策
2,185件の閲覧回数
danielmartynek
NXP TechSupport
NXP TechSupport

Hello Kedar,

The below snippet is taken from AN2434 Input/Output (I/O) Pin Drivers on HCS12 Family MCUs

https://www.nxp.com/docs/en/application-note/AN2434.pdf 

pastedImage_1.png

It is the same on S32K1xx, the range between 0.3 * VDD and 0.7 * VDD is note defined.

But it is guaranteed that the input reads LOW when I_IN < 0.3 * VDD and HIGH when V_IN > 0.7 * VDD and the hysteresis is in the undefined range.

There are many factors that influence the thresholds and the values you took are well in the undefined range.

Regards,

Daniel 

元の投稿で解決策を見る

1 返信
2,186件の閲覧回数
danielmartynek
NXP TechSupport
NXP TechSupport

Hello Kedar,

The below snippet is taken from AN2434 Input/Output (I/O) Pin Drivers on HCS12 Family MCUs

https://www.nxp.com/docs/en/application-note/AN2434.pdf 

pastedImage_1.png

It is the same on S32K1xx, the range between 0.3 * VDD and 0.7 * VDD is note defined.

But it is guaranteed that the input reads LOW when I_IN < 0.3 * VDD and HIGH when V_IN > 0.7 * VDD and the hysteresis is in the undefined range.

There are many factors that influence the thresholds and the values you took are well in the undefined range.

Regards,

Daniel