Hi!
I've been having some trouble getting the CAN (can0) RxFIFO working.
Since I am not using the SDK (too much CPU load for my application) I intended to use DMA transactions to unload the CPU. I wanted to test that the FIFO worked before configuring the DMA, but I can't get any messages with FIFO enabled.
Here is the CAN0 Init code,
void CAN_vInit(CAN_Type* pstCan)
{
CAN_tstCfg tstCfg;
tstCfg = CAN_CONFIG;
/* Disable Module */
pstCan->MCR |= CAN_MCR_MDIS_MASK;
/* Clear Clock Source Field*/
pstCan->CTRL1 &= ~CAN_CTRL1_CLKSRC_MASK;
/* Clear Module Disable Flag */
pstCan->MCR &= ~CAN_MCR_MDIS_MASK;
/* Wait for Freeze and Halt Assert Flags */
while (!((pstCan->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT));
/* Configure CAN Clocks */
pstCan->CTRL1 = CAN_CTRL1_CLKSRC(tstCfg.u8ClkSrc)
| CAN_CTRL1_PRESDIV(tstCfg.u8Presdiv)
| CAN_CTRL1_PROPSEG(tstCfg.u8Propseg)
| CAN_CTRL1_PSEG1(tstCfg.u8PhaseSeg1)
| CAN_CTRL1_PSEG2(tstCfg.u8PhaseSeg2)
| CAN_CTRL1_RJW(tstCfg.u8ResyncWidth)
| CAN_CTRL1_SMP(tstCfg.u8SmpPoints);
/* Configure Acceptance Masks */
pstCan->RXMGMASK = 0x1FFFFFFF;
for (uint8 i = 0; i < 16; i++)
{
pstCan->RXIMR[i] = 0x1FFFFFFF;
}
pstCan->RXFGMASK = 0x1FFFFFFF;
/* Enable Module */
pstCan->MCR = CAN_MCR_SRXDIS(STD_ENABLE)
| CAN_MCR_RFEN(STD_ENABLE);
//| CAN_MCR_IRMQ(STD_ENABLE)
//| CAN_MCR_LPRIOEN(STD_ENABLE);
/* Wait for FRZACK Deassert */
while ((pstCan->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT);
/* Wait for NOTRDY Deassert */
while ((pstCan->MCR & CAN_MCR_NOTRDY_MASK) >> CAN_MCR_NOTRDY_SHIFT);
}
In the previous code the parameter is CAN0, so that pstCan->X is CAN0->X.
Aside from this, I am setting the CAN0->RAMn[24] (address 0xE0 in FIFO filter table) as the desired ID for reception. Such that,
CAN0->RAMn[24] = CONTROL_ID;
When I send this ID, nothing changes, and there is no reception. IFLAGS1 doesn't change and IDHIT doesn't either.
Is there anything I am missing?
Please help.
