Gap between two buffers in SCLK I2S

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Gap between two buffers in SCLK I2S

658 Views
Mohit_Manvar
Contributor III

Hello,

I'm using S32K142 controller for I2S communication.

I configured I2S through SDK drivers and sending audio buffer continously.

below is  screenshot in which we are facing gap in SCLK and due to that other clocks are being disturbed.

Mohit_Manvar_0-1710421997315.png

 

configuration:

Mohit_Manvar_1-1710422030218.png

using following function to send data in infinite loop.

uint8_t I2S_DataBuff_u8[] = {0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA};

FLEXIO_I2S_DRV_MasterSendData(&I2SMasterState, I2S_DataBuff_u8, 32U);

 

please share solution , how can I continuous send data.

 

Regards,

Mohit

Labels (1)
0 Kudos
10 Replies

627 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hello @Mohit_Manvar,

It has been discussed here:

https://community.nxp.com/t5/S32K-Knowledge-Base/S32K3-FlexIO-I2S-Continuous-Transfer/ta-p/1692165

Unfortunately, we don't have such an example built with the SDK, but in principle, it is the same.

A baremetal example is attached.

 

Regards,

Daniel

 

0 Kudos

622 Views
Mohit_Manvar
Contributor III

Hi @danielmartynek ,

Thanks for sharing bare metal code.
I tried to import code and build but it is not building successfully. error is attached below.

Mohit_Manvar_0-1710910841313.png

 

additionally if Build for release it is building successfully.I tried to check issue for debug_flash mode but following issue it there

Mohit_Manvar_0-1710914861400.png

 

so I tried with S32Ds for ARM IDE but having same problem.

please share details how can I remove error.

 

Regards,
Mohit Manvar

Tags (1)
0 Kudos

608 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi Mohit,

In S32DS 3.5, create a new project (without SDK) and copy the cource code from the example.

It should work this way.

 

Regards,

Daniel

0 Kudos

605 Views
Mohit_Manvar
Contributor III

yes,It is now building.

but during executing code , it is automatically going to Default ISR from below line.

Mohit_Manvar_0-1710929202060.png

 

I'm using S32K144 EVB for debugging.

0 Kudos

510 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Mohit_Manvar,

I haven't had the time to test it.

Is it fault exception?

Please implement HardFault_Handler() in the project.

https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447

 

Regards,

Daniel

 

0 Kudos

502 Views
Mohit_Manvar
Contributor III

Hello,

I tried to check causing of fault and I got this.

Mohit_Manvar_0-1711425809119.png

 

please briefly explain where should I call fault handler in code and how can I use it?
if possible please configure at your side and revert me back.

 

Mohit

0 Kudos

434 Views
Mohit_Manvar
Contributor III

Hello experts,

 

please help out to resolve this open topic.

 

Best regards,

Mohit

0 Kudos

379 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Mohit_Manvar,

I'm sorry for the delay. I see now that the project has been built for the first maskset of S32K144 where DMA clock could be gated in PCC[CGC]. This was removed on the current version of the MCU.

Just comment this line out:

// PCC->PCCn[PCC_DMA0_INDEX] |= PCC_PCCn_CGC_MASK;

 

Regards,

Daniel

 

 

0 Kudos

291 Views
Mohit_Manvar
Contributor III

Hello,

I tried to comment out that line but at the end it is not giving output for I2S.

Mohit_Manvar_0-1713163872342.png

Does any other modifications needed?

 

output pins:

Mohit_Manvar_1-1713163909113.png

 

 

please suggest your thoughts.

 

Mohit

0 Kudos

282 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Mohit_Manvar,

Unfortunately, we don't have the capacity to port and debug every example right now.

The examples are provided AS IS.

 

Regards,

Daniel

 

0 Kudos