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S12 / MagniV Microcontrollers Knowledge Base

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How to get device ID and write program once field without programming application to the S12Z device in the CodeWarrior (Eclipse).   Even the datasheet does not present the device ID it can be read at address 0x1FC000. The device ID is size of 8 bytes from 1F_C000 to 1F_C007. The meaning of the field is confidential information. Of course, other "reserved" fields on higher addresses can also be read but their meaning is also confidential. The ID is not presented in the documentation because it has reason for company only. However, some users require unique identification of the device. It is possible to use this number. In order to read the ID, it is enough to create simple project in the CodeWarrior and connect to the device without programming it and run “mem” command in the debug shell window. If you do not want to remember address ranges, then it is better to prepare command file and execute it.   Of course, we can also simply use memory window.   It is a different story if we want also to see program once field. In this case we have to execute a set of commands to get it. As an example of command file which can be executed to get device ID and program the program once field I present two command files. They can be executed in the debugger window – see and test attached project. They are AAA_Read_Device_ID_And_OTPROM.cmd  and AAA_ProgramOnceField.cmd. The project which also presents reading and writing program once field is not relevant but should be created for the device we want to play with. It is not required to be code (simple code, enough to use what is generated by wizard) loaded into the MCU’s memory. However, necessary is the debugger is connected to a memory. Because of this it is enough to set:   …. And press debug   In the debug enable “Debugger Shell”:   Before continuing please modify flash clock setup in both files to value suitable for programming on the basis of the oscclk you use. In the files search for lines    Write into debugger shell command which runs the AAA_Read_Device_ID_And_OTPROM.cmd: source "c:\D\CODING & SW\ECLIPSE\S12ZVMC-FLASH-WRITEONCEFIELD-CW106\AAA_Read_Device_ID_And_OTPROM.cmd" (it is possible you have different path to the file…please change it)   The command will execute and shows: Device ID And Program field phrase 0. If you want to see another phrase you should modify AAA_Read_Device_ID_And_OTPROM.cmd line set PHRASE 1. Change 1 to the phrase you want to see and run the command presented above “source …..” again. It is enough to press arrow up on the keyboard to see and use previous commands.   In order to program selected field use and run command “source” with the file: AAA_ProgramOnceField.cmd source "c:\D\CODING & SW\ECLIPSE\S12ZVMC-FLASH-WRITEONCEFIELD-CW106\AAA_ProgramOnceField.cmd"   The same note as previosly, the path you have could be different so adjust it. The same line as in previous file should be changed to select the phrase you want to program. As a result, you will see programming algorithm and also read back of the field, example of output: %>source "c:\D\CODING & SW\ECLIPSE\S12ZVMC-FLASH-WRITEONC EFIELD-CW106\AAA_ProgramOnceField .cmd" ############################ Programming Field = 2 ############################ cmdwin::mem 0x0386 %x = 0x30 cmdwin::wait 1000 cmdwin::mem 0x0382 %x = 0x05 cmdwin::mem 0x038C %x = 0x07 cmdwin::mem 0x038D %x = 0x00 cmdwin::mem 0x038E %x = 0x00 cmdwin::mem 0x038F %x = 2 cmdwin::mem 0x0390 %x = 0xA2 cmdwin::mem 0x0391 %x = 0xB2 cmdwin::mem 0x0392 %x = 0xC2 cmdwin::mem 0x0393 %x = 0xD2 cmdwin::mem 0x0394 %x = 0xE2 cmdwin::mem 0x0395 %x = 0xF2 cmdwin::mem 0x0396 %x = 0xA3 cmdwin::mem 0x0397 %x = 0xB3 cmdwin::mem 0x0386 %x = 0x80 cmdwin::wait 1000 ############################ Read back Programmed Field = 2 ############################ cmdwin::mem 0x0386 %x = 0x30 cmdwin::wait 1000 cmdwin::mem 0x0382 %x = 0x01 cmdwin::mem 0x038C %x = 0x04 cmdwin::mem 0x038D %x = 0x00 cmdwin::mem 0x038E %x = 0x00 cmdwin::mem 0x038F %x = 2 cmdwin::mem 0x0386 %x = 0x80 cmdwin::wait 1000 cmdwin::mem 0x0390 8      390  $a2 $b2 $c2 $d2 $e2 $f2  $a3 $b3    . . . . . . . .    Now the question, where to find commands to be able to prepare such a command files, can be asked. 1) The first information source is the CodeWarrior help. For example, search for keyword DW and it could find a command list. 2) Tcl Reference Manual   3) http://www.tcl.tk/     Finally, in the attached project can be seen also approach how to write program once field by SW. Of course, mentioned cmd files are also part of the project.
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CAN Standard ID, CAN Extended ID memories refreshment   A human is a creature forgetting things, procedures and a lot of useful principles in a very short time especially when it often jumps between different projects. I also solve the CAN interface filter setup issues occasionally and even I did it a lot of times I always have to think how to set the filter easily and fast. Because of this, on the basis of last experience, I created an excel sheet this year which provides me an easy return to my CAN filter memories. I am not sure it will be helpful for everyone as it is helpful for me, however, I am sharing..... Each of us has different thinking and ways of visualization so any idea for improvement is appreciated in advance.      
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CAN setup calculator for S12(X) and MagniV devices.   I would like to share my CAN setup calculator I've been using for a few years. I’ll be glad if anyone who sees any discrepancy in calculation or values would contact me with comment or idea for improvement. Even I think the sheet is intuitive I’ll provide a few notes. 1) Entering input values a) fosc – defines frequency of input clocks for CAN peripheral. It can be either oscillator clock or bus clock in dependence what is used in application. Note: Because of CAN clock requirements I suggest to use oscillator clock as a source clock for CAN peripheral to meet oscillator precision parameter. The recommendation is based on the fact of that the PLL is usually used for bus clock generation and the PLL unlock parameter is usually out of clock specification. Especially un-lock parameter which can be observed and processed by PLL lock interrupt. Only for example, S12ZVC defines:   b) Physical Interface Tx+ Rx propagation delay – The parameter can be calculated from the data presented in the data sheet for given CAN transceiver. A few values are presented in the top of the sheet.   c) Required sample point - A good general rule is to set the sample point above 80%. Based on the experiences of the automotive industry, the selected sample point should be near the 80% value.   2) Output values   The results field show calculations for all combinations. The simplification, I use, is the max SJW is always used.   Lines containing correct values for bitrate setup are highlighted with orange color. The only thing which is not checked is sample point. You should check calculated “Sample point calculated” whether it corresponds to your requirements. There are two correct values of CANBTR0 and CANBTR1 for required bitrate but the bottom orange line meets exactly our requirement for sample point.
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Based on S12G128,  Firstly, placed some const at PAGE_0B,  Secondly, place the same data at NON_BANKED  Finally, you can check whether reading result of paged const is right. Of course, they are the same.  Cheers !
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This example: 1. write unprotected P-Flash area 2. protect target P-Flash area 3. tries to write protected P-Flash area 4. call Protection Override command for temporary modify P-Flash protection 5. write into temporary unprotected P-Flash area 6. restore original P-Flash protection scheme The part of P-Flash memory used in this example for writing tests (0xFF8000..0xFF8FFFUL) is excluded from linker using. Please look at prm linker file for more details.   The flash_array constant with Protection Override Comparison Key is not directly referenced in the code, therefore we must enter the constant name into ENTRIES section in prm linker file for avoiding stripping it out as unused. Please look at P-Flash Protection Register (FPROT) chapter in the reference manual for more details about P-Flash protection. The key for Protection Override should be rather received from external source and used as PFLASH_Protection_Override() parameter. The correct Protection Override key is here hard-coded (err = PFLASH_Protection_Override(0xCAFE, 0xF...) for example code simplifying.   I hope it helps you. Radek
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Program Once Field is a part of Flash IFR which can be used to store non-volatile data. This field consists from 8 phrases (64 bytes), where each phrase has an index (0-7).   phrase index 0      0x1F_C0C0 - 0x1F_C0C7   phrase index 1      0x1F_C0C8 - 0x1F_C0CF   phrase index 2      0x1F_C0D0 - 0x1F_C0D7   phrase index 3      0x1F_C0D8 - 0x1F_C0DF   phrase index 4      0x1F_C0E0 - 0x1F_C0E7   phrase index 5      0x1F_C0E8 - 0x1F_C0EF   phrase index 6      0x1F_C0F0 - 0x1F_C0F7   phrase index 7      0x1F_C0F8 - 0x1F_C0FF The attached example code presents Flash commands to access the IFR Program Once Field. Program Once command takes a single phrase (8 bytes) of data and one phrase index. Each phrase can be programmed independently but only once since the non-volatile information register in P-Flash cannot be erased. On attempt to overwrite a phrase that has been once written, ACCERR flag is set in FSTAT register and the command is terminated.   Similarly, Read Once command takes one phrase index and returns a phrase of data. After this command is executed data are available in FCCOBx registers and can be read by software. The Program Once and Read Once commands must not be executed from the Flash block containing the IFR Program Once reserved field to avoid conflicts. Therefore, a function that launches Flash commands is placed into RAM.
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This example shows a few possible configurations of the S12PWM8B8CV2 PWM module. Five PWM channels are configured with different clock source, polarity, alignment, period and duty-cycle.   Four clock sources (A, B, SA, SB) are derived from bus clock using dividers.   Selected polarity of PWM channel determines the duty-cycle whereas the alignment determines the period of the PWM signal.   Four 8-bit channels (4-5, 6-7) are concatenated into two 16-bit channels. Channels 4 and 6 become high-order channels while channels 5 and 7 become low-order channels. These low-order channels (5 and 7) are the output channels routed to a port  and they configure the clock, polarity, alignment and enablement of the PWM signal.  Period and duty-cycle of the signal are configured with both the low-order and high-order channels.   The period registers (PWMPERx) and the duty-cycle registers (PWMDTYx) are double buffered. When they are rewritten while the channel is enabled, the change will not take effect until one of the following occurs: 1. The effective period ends 2. Counter resets 3. The channel is disabled
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This example simulates ECC issue by cumulative write into the same EEPROM area without an erasing.   The EEPROM erase operation set all bits into log1. The EEPROM program operation may keep bit cells in log1 state or change it into log0 state, but not in opposite way.   The S12Z MCU EEPROM is protected by 22-Bit ECC Scheme. Every word (16bits) is protected by additional 6 bits with ECC checksum. The ECC values are not accessible for users. Every EEPROM reading triggers also ECC check by internal logic. The single bit error in user data may be corrected by ECC checksum. The double bit error cannot be corrected.   The ECC protection is implemented also at flash controller commands and results are signalling by MGSTAT bits.   The first case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b10 due to fact that just 1 bit is different during write verification (correctable error)   The second case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b11 due to fact that more than 1 bits are different during write verification (non-correctable error)   The third case simulates Double-bit ECC error during reading. The MGSTAT bits after the second write are 0b11 due to fact that more than 1 bits are different during write verification (non-correctable error)       The EEPROM patterns are selected for highlighted described behavior and they don't have any real meaning.   The cumulative write is not allowed for normal operation!!! The code from this example should be used only for design testing - not in production!!!   Please, see the prm file. Address range 0x100000-0x100001 is excluded from default EEPROM and is used as user EEPROM memory The size of EEPROM sectors is 2 bytes. The EEPROM_Program() function may program up to 4 words in single flash command.   Note: The EEPROM_Program() function was updated - erase verification is skipped     I hope it helps you. Radek
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This document is intended to show the new SM912F634xxxxx part and the differences between this new part and the MM912F634xxxxx part.
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For debug purposes, it is possible to read and write the user data and the ECC value directly from/to the SRAM memory. For these debug accesses a register interface is available.   By the debug access and writing incorrect data + ECC values into the system memory,  the single and double bit ECC errors may be simulated for checking the software error handling.   The debug registers may be modified only in a special mode.   The tested address 0x3000 is excluded from linker use - see prm linker file.   I hope it helps you. Radek
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This example simulates ECC issue by cumulative write into the same Flash area without an erasing.   The Flash erase operation set all bits into log1. The Flash program operation may keep bit cells in log1 state or change it into log0 state, but not in opposite way.   The S12Z MCU Flash is protected by 39-Bit ECC Scheme. Every aligned 32bits is protected by additional 7 bits with ECC checksum. The ECC values are not accessible for users. Every Flash reading triggers also ECC check by internal logic. The single bit error in user data may be corrected by ECC checksum. The double bit error cannot be corrected.   The ECC protection is implemented also at flash controller commands and results are signaling by MGSTAT bits.     The first case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b10 due to fact that just 1 bit is different during write verification (correctable error)   The second case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b11 due to fact that more than 1 bits are different during write verification (non-correctable error)   The third case simulates Double bit ECC error during reading. The MGSTAT bits after the second write are 0b11 due to fact that more than 1 bits are different during write verification (non-correctable error)     The flash patterns are selected for highlighted described behavior and they don't have any real meaning.   The cumulative write is not allowed for normal operation!!! The code from this example should be used only for design testing - not in production!!!   Please, see the prm file. Address range 0xFF0000-0xFF01FF is excluded from default ROM and is used as user flash memory The size of sectors is 512 bytes = 64 phrases.   Note: The PFLASH_Program() function was updated - erase verification is skipped     I hope it helps you. Radek
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Here is a SW example demonstrating measurement of the bandgap voltage featured on a microcontroller. The bandgap voltage is routed to an internal ATD channel. ATD converter measures the input voltage and stores it to a variable located in Flash memory. The SW example project is made in CodeWarrior v5.1 for MC9S12XEP100 device.
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Attached zip file contains three Code Warrior project for MagniV devices (S12ZVM, S12ZVL and S12ZVC). Each of them demonstrates usage of High Voltage Input feature. Find detailed description in the header of main.c file of the CW project.
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The example code shows how to invoke single or double bit RAM ECC error at S12Z devices.   Some basic overview about S12Z ECC codes may be found in thread AM/FLASH ECC Error handling .
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Here is the example code demonstrating erase/write/read of internal EEPROM module integrated into MagniV devices such as S12ZVM, S12ZVC, S12ZVL etc.   Find detailed description in the project's main.c file.   The example project was created in CodeWarrior IDE v10.6.4 and tested on TRK-S12ZVL board.
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Here is the example code demonstrating erase/write/read of internal Flash module integrated into MagniV devices such as S12ZVM, S12ZVC, S12ZVL etc.   Find detailed description in the project's main.c file.   The example project was created in CodeWarrior IDE v10.6.4 and tested on TRK-S12ZVL board.
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A project presents control of the HD44780 driven display where it is assumed that RW pin of the LCD is permanently connected to “Write” level (GND). The SW contains mirror(s) of the LCD display as array of characters stored within RAM. Both read and write function can be used because writing is performed to the display and also to the array. Read functions are directed to the character array stored within RAM.
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 *******************************************************************************  * File              main.c  * Owner             LaMa-TIC-RPR  * Version           1.1  * Date              Jun/17/2016  * Classification    General Business Information  * Brief             S12Z Frequency Measurement at PT0 (IOC0_0) by TIM module  *                   in input capture mode  *******************************************************************************  * Detailed Description:  * The code measures frequency at PT0  * It demonstrates  * - It measures frequency at PT0 by means of TIM module IOC0_0.  * - The measurement is sensitive on rising edges so duty cycle has no affect  *   to the measurement  * - Constants:  *           BUSCLOCK  *           MAX_OVERFLOWS  *           TIMER_PRESCALLER  *      must be defined  * - MAX_OVERFLOWS determines minimum measurable frequency.  *   It is max. allowed number of overflows. When overflows counter reaches  *   this value it the flag FREQUENCY_TOO_LOW is set. The message  *   PERIOD BETWEEN TWO EDGES IS TO WIDE is then written to a variable "str"  *   This value gives time interval:  *     T = TIMER_PRESCALER * MAX_OVERFLOWS * 65536 / BUSCLOCK      *     For example:  *      - TIMER_PRESCALER = 1  *      - MAX_OVERFLOWS   = 1000  *      - BUSCLOCK        = 16,000,000Hz  *      T = 1 * 1000 * 65536 / 16,000,000 = 4,096s  => f=0,244140625Hz  * - TIMER_PRESCALER = { 1,2,4,8,16,32,64,128} - smaller values give more  *   precise values but it generates timer overflow more frequently  * - the physical representation of the measured frequency is stored in the  *   string "str"  *  * - The measurement precision is df which can be expressed as:  *  *    df = BUSCLK / ((n^2 + n) * PRESCALER); n = measured number of TCNT periods  *               *   For example: BUSCLK = 16MHz, n = 399, PRESCALER = 1  *     *     *             df = 16,000,000 / ((399^2 + 399) * 1) = 100.25Hz  *               *             so, count 399 means f=BUSCL/399=16,000,000/399 = 40,100.25Hz  *             so, count 400 means f=BUSCL/400=16,000,000/399 = 40,000.00Hz  *                   * So this method is not suitable for large frequencies as can be seen in  * following table (percentual error we can get is df/f):  * n   f[Hz]      df[Hz]                        n   f[Hz] df[Hz]  * 1   8000000   5333333,3           101 1553,0 30,1  * 2   2666666,6 1333333,3           102 1522,9 29,2  * 3   1333333,3  533333,3           103 1493,6 28,4  * 4    800000    266666,6             104 1465,2 27,6  * 5    533333,3  152380,9            105 1437,5 26,8  * 6    380952,3   95238,0             106 1410,6 26,1  * 7    285714,2   63492,0             107 1384,5 25,4  * 8    222222,2   44444,4             108 1359,1 24,7  * 9    177777,7   32323,2             109 1334,4 24,0  * 10   145454,5   24242,4            110 1310,4 23,4  * 11   121212,1   18648,0            111 1287,0 22,7  * 12   102564,1   14652,0            112 1264,2 22,1  * 13    87912,0   11721,6             113 1242,0 21,6  * 14    76190,4    9523,8             114 1220,4 21,0  * 15    66666,6    7843,1             115 1199,40,502  * 16    58823,5    6535,9             116 1178,8 19,9  * 17    52287,5    5503,9             117 1158,9 19,4  * 18    46783,6    4678,3             118 1139,4 18,9  * 19    42105,2    4010,0             119 1120,4 18,5  * 20    38095,2    3463,2             120 1101,9 18,0  * 21    34632,0    3011,4             121 1083,8 17,6  * 22    31620,5    2635,0             122 1066,2 17,1  * 23    28985,5    2318,8             123 1049,0 16,7  * 24    26666,6    2051,2             124 1032,2 16,3  * 25    24615,3    1823,3             125 1015,8 15,9  *  * - PCB setup:  *   - J35 is disconnected because measurement is done on PT0  *   - pulse generator is connected to the J35 pin 1. (PT0)  *    * - Reference to documentation: MC9S12ZVLMR1.pdf Rev. 1.02  * - Tested on TRK-S12ZVL  * - MCU MC9S12ZVL32 0N22G  * - OSCCLK = 4MHz  * - BUSCLK = 16MHz (set by PLL)  *  * The info about frequency and count is transmitted over the SCI0 Tx which is  * routed (MODRR) to PS1 pin  *  *******************************************************************************  Revision History:  Version Date          Author            Description of Changes  1.0     Jun/17/2016   LaMa-TIC-RPR      Initial version  ******************************************************************************/
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The ADC measurement is always relative – relative to your voltage reference. The most of the applications don't allow to use accurate and expensive voltage reference. In that case, VDDA is used as the reference for ADC measurement. Since the operational VSUP range starts from 3.5V and accuracy of the voltage regulator is limited, we should use internal bandgap reference for compensating ADC voltage results. The bandgap voltage VBG has a narrow variation over temperature and external voltage supply. The example shows how to compensate ADC results by additional bandgap voltage measurement.
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In the ZIP file you can find two CodeWarrior projects, one for S12ZVM and other for S12ZVL device, demonstrating the trimming of Autonomous Clock (ACLK - trimmable internal RC-Oscillator) which can be selected as clock source for some CPMU features. Also the Autonomous Periodical Interrupt feature using the trimmed ACLK as a clock source is demonstrated too in this SW example.
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