S12 XEP100 Clock Speed Math

[overclocker123]

Hello,

My company is using an S12 XEP100 General Purpose Eval Board (S12XE General Purpose Evaluation Board | NXP Semiconductors). We have increased the clock speed by turning on the PLL and adjusting the respective register settings. Our settings are as follows:

SYNR = 0xD8

REFDV = 0x01

POSTDIV = 0x01

Attached is a picture of the math based on these settings, but the summary is that we expect the bus clock to be 25MHz. However, when using a scope on Port PE4 with the ECLK enabled, we see a bus clock of 50MHz, double the expected.

The only working theory that we have is that Fosc is actually 8MHz instead of the 4MHz from the crystal. Is there something else that we missed? Any thoughts?

Thank you

[lama · Accepted solution]

Hi,

this MCU is from older set which enables you to check oscillator in special mode.

So easily, if you connect BDM to it and starts the MCU in special single chip mode (SSM) - standard debugging process when the MCU stops and waits for BDM command from the PC. In this case ECLKCTL_NECLK is set to 0 after reset which means you are able to check the OSCCLK/2 frequency at PE4 pin.

(Another approach to set the SSM is reset the MCU with pins MODC=MODB=MODA=0)

One more thing, could you please chceck whether you accidentally do not write PLLSEL=1 before you change PLL setup registers and/or you do not have already PLL set somewhere else in the code in some forgotten routine which sets the PLLSEL to 1 (start12.c,....) .

Best regards,

Ladislav

[overclocker123]

Thanks for your advice. I was able to connect to the BDM and read the OSSCLK/2 as 4MHz, putting OSSCLK at 8MHz. This confirms our theory that the OSSCLK is double the physical crystal frequency on our board. (And thankfully no, I did not have any errant settings of the PLL registers)

 I think we are all set now, thank you again for all your help!

[lama]

Hi,

Your calculation is ok. You can check it with calculator:

https://community.nxp.com/t5/S12-MagniV-Microcontrollers/S12X-PLL-Filter-Calculator/ta-p/1125313

Download  S12XE_iPLL_Calc_103.exe from attachments at the page

It would be good to check whether the oscillator uses the first harmonics. Also it is good to be sure the load capacitance is correctly calculated. For Pierce circuitry the load capacitors must be  C1=C2 > 2*CL where CL is a load capacitance of the oscillator provided in the oscillator data sheet.

Finally, be sure you really measure ECLK and not ECLKX2..... (I know you wrote PE4 but it already happened that HW eng. accidentally connected to the check pin ECLKX2)

(Note, there are some examples from my history at https://community.nxp.com/t5/S12-MagniV-Microcontrollers/LAMA-s-S12XE-unofficial-examples/ta-p/11007...  )

Best regards,

Ladislav

[overclocker123]

Ladislav,

Thank you for the information.

I would assume that the load capacitance is correctly calculated as we are using an evaluation board as sold by NXP with no modifications. Your suggestion about the first harmonic is intriguing though. How would I go about checking that? 

And thank you for all your example code, I have used it as a reference for a couple projects.

Kind regards,

Kyle