MM9z1-638:no wakeup reason

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MM9z1-638:no wakeup reason

680 Views
gumu
Contributor IV

Dear Sir,

When performing stress tests on device sleep/wake-up, we got reset reason 0x100 and referring to the PCR_SR register description in the manual, it means a wake-up from low power mode, but no wake-up reason is indicated,The occurrence of this issue is very low, approximately 1 in 1000 occurrences.. The system was awakened after sleep but without any wake-up source. What could be the possible cause of this?

Thanks!

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6 Replies

665 Views
Q_man
NXP Employee
NXP Employee

Hi,

you are waking up from STOP mode (Interrupt)? Can you share the code where you read the 0x100?

W.

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664 Views
gumu
Contributor IV

Hi @Q_man ,

please see the code as below:

extern void ApiPowerEnterStopMode()
{
	u8 CAN_status[3];
	u16 timeout = 10000;

	CAN_STDBY(STANDBYMODE);
	DelayMs();
	Sleep_CAN(CAN0, CMPTX);                           // request CAN channel 0 go to sleep with completing transmission scheduled
	do {
		Check_CAN_Status(CAN0, CAN_status);          				  // read the channel 0 status
	} while (!(CAN_status[1] & SLPAK) && timeout--);				  // wait till SLPAK bit set

	B_PCR_WUEH_WUPTB4 = 1; // enable PTB4 wakeup

	B_GPIO_TSENSE = 0;
	B_GPIO_VSENSE = 0;
	ADCDisable();
	TsenseDisable();
	PCREnterStopMode();
	ApiPowerRecoverFromStop();
	//PCREnterSleepMode();
	// .....zzzzzzzzzzz (stop mode)
	// after wakeup the code continues to run here....
	// but first the D2D Interrupt service routine will be run
	
	VsenseInit();
	CsenseInit();
	TsenseInit();
.....
}
static void ApiPowerRecoverFromStop(void) 
{
	u16 timeout = 1u; 

	B_PCR_CTL = 0x0300;         // Go to normal mode
	while(timeout--)          
  	{
   		Nop();
  	}
	while (!(B_PCR_SRH&0x01))    DO_NOTHING;  // Wait for Clock Domain Change
	u16gPowerRstReason = B_PCR_SR;
	B_PCR_SR = 0xFFFF;
	B_WD_CTL = 0x0700;          // disable Watchdog after wake up
}
void PCREnterStopMode(void)  {	
  u16 timeout = 1;                              //100us

  IrqDisable();     
  B_INT_MSK = 0xFF3F;                             // disable all Analog Interrupts 
  B_ACQ_SRH = 0xFF;                               // Clear pending Flags
  B_INT_MSK = 0xFF00;                             // enable all Analog Interrupts 
  
  B_PCR_SR =  0xFFFF;                             // Clear Flags
  B_PCR_CTL = OPM_SET_STOP;                       // Goto Stop Mode
  while(timeout--)                                
  {
      Nop();
  }
  StopEnable();		
  Nop();
  StopEnter();
}

 

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660 Views
Q_man
NXP Employee
NXP Employee

could you please also share the D2D Interrupt handler (for source 0)

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657 Views
gumu
Contributor IV

Hi @Q_man ,

D2D ISR handler code:

#ifndef USE_DEFAULT_VECTOR_TABLE 
interrupt void isrD2D(void)
#else
interrupt VectorNumber_Vd2di_ext void isrD2D(void)
#endif
{
	u16 u16Temp;
	u8 i;
	
	switch (B_INT_VECT) {

		case D2DINTWUP: 												// Wake up from Stop or no IRQ
			while(!CPMU_IsPLLlocked()) DO_NOTHING;						// wait until PLL lock
			
			if(B_PCR_CTL_OPM!=0)	{
				B_PCR_CTL = OPM_SET_NORMAL;									// set normal mode
				//! \todo where is this described?
				while (!(B_PCR_SRH_WLPMF )) DO_NOTHING;   					// Wait for Clock Domain Change  
//				u16WUsrc=B_PCR_SR;									// reads 0x910 HVRF+WLPMF + WULINF    or
//																		//       0x908 HVRF+WLPMF + WUPTB4F
//				B_PCR_SR = 0xFFFF;     									// Clear PCR_SR ok
			}	
			break;

		case D2DINTUVI: 												// UVI
			break;
		case D2DINTHTI: 												// HTI
			break;
		case D2DINTLFI: 												// LIN PHY 
			// check if LIN is force low by SCI
			if(B_GPIO_OUT3== OUT_SCITX)  {								// if PTB3 connected to SCI Tx
				if(B_GPIO_DATA_PD3==0)  {								// and SCI_Tx is low
					while(1) DO_NOTHING;
				}
			}
			B_LIN_SR_TXDOM = 1;										// clear TXDOM
			break;
		case D2DINTCH0: 											
			break;
		case D2DINTCH1: 											
            break;
		case D2DINTCH2: 											
            break;
		case D2DINTCH3: 											
    		B_TFLG1_C3F = 1;											
    		ISR_D2DINTCH3();											// see main.h											
    		break;
		case D2DINTTOV: 											
            break;
		case D2DINTSCIERR: 												
    		ISR_D2DINTSCIERR();										    // see main.h
            break;
		case D2DINTSCITX: 											
            break;
		case D2DINTSCIRX: 												
    		ISR_D2DINTSCIRX();										    // see main.h
            break;                

		case D2DINTCVMI: 												// CVMI - Interrupt     Current Voltage Measurement IRQ
    		CsenseIsrHandler();											// evaluate current first for shunt voltage compensation (see main)
			VsenseIsrHandler();
			break;

		case D2DINTLTC: 												// Life Time Counter Overflow 
            break;                
            
		case D2DINTCAL: 												// CAL
//    		PTA_PTA0 ^= PTA_PTA0;
            break;                
		default:  														// dummy
            break;               
  } 
}

 

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595 Views
gumu
Contributor IV

Hi @Q_man ,

We have conducted stress tests on 2 devices and encountered the same issue with a low probability. Is there any update regarding this issue?

Thanks!

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429 Views
Q_man
NXP Employee
NXP Employee

Hi Qumu,

I have not observed such behaviour.

How is the GPIO PTB4 configured?

How does the circuit look like connected to PTB4?

How is the wakeup triggered? From CAN?

Are there any other wakeup sources enabled?

W.

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