DO not feedback the first data by LIN community after the system(base on s12ZVML31) awake from sleep

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DO not feedback the first data by LIN community after the system(base on s12ZVML31) awake from sleep

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sunkemiao2021
Contributor I

Dear:

        my project is base on s12ZVML31. The main problem is when slave is awaked from sleep,  the slave is not feedback the first data by the master demands. For example,slave is sleep.The master send data to slave.The slave is awaked. Then the master send the Pub data to slave once,the slave will not feedback the data.If the master send the sencond Pub data to slave ,the slave will immediately  feedback data. I do three tests that the master send the first data that delay 10ms ,50ms,and 2s after the slave is awaked .the result is the same that the slave is not feedback the first data . Please tell me why the slave not feedback the first data after it is awaked from sleep.

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello @sunkemiao2021,

This is expected because at the time the LIN PHY passes the active edge to the SCI module, the MCU is in the Stop mode with system clock disabled. The SCI cannot receive the first data. The SW should clear the SCI flag and wait until the OSC clock is reenabled and the SCI has the corect baudrate set etc.

 

Regards,

Daniel

 

 

 

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sunkemiao2021
Contributor I

Hi Daniel

        I follow your idea to test my mcu.when the mcu was awakened,I deliberately delayed 5ms and 2s to send the data.I find when I send the first and second frame, the mcu was no response until the third frame.I test many times. The result is the same.Can you help me examine my follow program. I guess I read the SCIxSR1 and SCIxASR1 value,that mean I have cleared the SCI flag. Delay 5ms and 2s,I think  clock of the mcu shuld have reseted successfully.

void lin_hal_ISR(void)
{
l_u8 sci_reg_sr1;
l_u8 sci_reg_asr1;

sci_reg_sr1 = LIN_SCI_REG->SCIxSR1; /*lint !e923*/ /* HW register access */
sci_reg_asr1 = LIN_SCI_REG->SCIxASR1; /*lint !e923*/ /* HW register access */
lin_hal_rx_data_guc = LIN_SCI_REG->SCIxDRL; /*lint !e923*/ /* HW register access */
//LIN_SCI_REG->SCIxASR1&=0xFF;
//LIN_SCI_REG->SCIxSR1=0xFF;

}

 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @sunkemiao2021,

Hard to say what could be wrong, it requires debugging on your side.

But in the code you posted, there is one issue.

The SCIASR1 register can be read if AMAP = 1.

danielmartynek_0-1653393640878.png

 

 

Regards,

Daniel

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