When HRESET_B will be deasserted after power on

[rachanatm]

Hi,

We are using P1022NXN2LFB processor in our design. We are using POWER_EN to control switchable supplies. When HRESET_B  will be deasserted? i mean, will it be deasserted after 'Always ON core supply' and 'Always ON I/O supply' are stable and before switching on switchable supplies or will it be deasserted after all the supplies are stable. We don't have any external system/supervisor to control the reset. So please let me know how can we control .HRESET_B.  and also please let me know  what is the state of HRESET_B in deep sleep mode

[Bulat]

HRESET has several requierements for deassertion, please take a look at figure 4-5 of the ref manual. This includes hold times after POR configuration inputs have been valid (minimum 25us for PLL related inputs and 4 SYSCLK cycles for other ones). All power supplies (including switchable ones) should be stable, at their nominal values.

HRESET should be high in deep sleep mode.

Regards,

Bulat