[P2020] [XPedite5501 board] Modify PLL configuration

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[P2020] [XPedite5501 board] Modify PLL configuration

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remyritchen
Contributor I

I'm looking for a mean to modify CCB clock on XPedite5501 board.
I read XPedite5501 User’s Manual (Revision G) without success.

CCB ratio is included in POR configuration. Maybe reconfiguration is possible through EEPROM memory and uboot command ?
Is there any documentation about it ?

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ufedor
NXP Employee
NXP Employee

This is a third-party board and we do not have access to its documentation.

Please consider creating a Technical Case to send us the User's Manual and schematics:

https://community.freescale.com/thread/381898

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