Hi,
I am using QorIQ SDK version 2.0-1703 for LS1046A CPU.
We have used a number of methods to optimize jitter to reach our desired level.
Core 1-3 is isolated.
Is there a way to move or disable arch_timer to core 0 during interrupt?
The same goes for IPI1.
Thanks,
Best regards.
Gyosun.
You could disable arch_timer in dts file.
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xf) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_RAW(0xf) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_RAW(0xf) |
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_RAW(0xf) |
IRQ_TYPE_LEVEL_LOW)>;
status = "disabled";
};
Is there any side-effects when arch_timer disabled? After disabled it, will use arch_mem_timer to sync all of cores?