DDR Validation Tool for LX2160 and CX7 eval board

[vsm]

We bought solid run evaluation board with LX2160 processor. Board working well. It means Linux can boot and working. I am not sure how to deal with your DDR tool. Iam able to connect to the board over JTAG with Codewarrior studio. In DDR Configuration window I select "Read from target" option. It looks like that some communication works and Properties window with non-default parameters is filled.

But now if I run Validation page I never get a  pass test (Auto search and detect for VREF or BIST-1 or whatever). But BIST test is ok during ATF boot. So, the question is what is wrong? HW works, I can get correct information from running hardware. Why the DDR validation  can`t work with this set of parameters? How can I run ddr validation correctly? Can you offer me step to step manual how to run this test with this “gold” hardware?

[rabeeh]

Hi,

I'm not sure if this issue is still relevant or not; but following are details how to achieve this -

https://solidrun.atlassian.net/wiki/spaces/developer/pages/197493994/LX2160A+COM+Hardware+User+Manua...

You simply need to remove the zero ohm resistor.

[yipingwang]

When you click "read from target" button, please make sure that u-boot is up and enter into prompt mode on the target board.

You could try to use "read from SPD" method to create a QCVS DDR project, then do the validation.

If there is no SPD on the target board, please create a QCVS DDR project with the default parameters, then modify the properties panel according to your DDR datasheet.

Please refer to the attached document and 

https://community.nxp.com/t5/Qonverge-Knowledge-Base/DDR-Controller-Configuration-on-LS2085-LS2080-B...

[vsm]

Hello,

Thank you very much for your response. It helps me to focus to next steps.

Configuration gets form “read from target” doesn’t work for me.

For SPD reading I need to change codewarrior/Common/QCVS/Optimization/resources/QorIQ/ARMv8/ddr/sys_init.py  and comment utils.gdb_execute("cw_reset %d" % reset_delay) calling. Every time I get gdb.GdbError: ERROR: Target reset failed.It looks like the reset between jtag and processor is not implemented good.

So, with SPD parameters Iam able to run and pass „Auto search and detect for DDR VREF start value“ test. Hope. But next test „Determine the best ATx Delay value“ fails (each column in row was red). What does it mean? What can I do better to pass next test. Reason of failed each cell in „Determine the best ATx Delay value“ is "DDR: PHY TIMEOUT".

And all Operational tests fail too (except of BIST-1Wire…..)

[yipingwang]

Please refer to the following suggestion from the AE team.

CX7 evaluation board is not an NXP product that we can support. CX7 eval board is made by Solid Run embedded edge computing. it is most likely that the JTAG connection reset was not built compatible with QCVS reset requirement.

[vsm]

Hello,

I examined the CodeWarrior Connection Server log. (log v) I see error:

ccs_get_cc_config(*config_string, count)

  ERROR(23): CC not present

setup_cc(serverh=0,config_string= cwtap:10.0.0.17 )

*** unhandled(command=169) ***

This error occurs in the log every time when CodeWarriror is connecting to server or trying some test from DDR Validation tool.

Can this error have influence on something?