SPI slave using PE: detecting start and end of frame

isaklevinson · ‎07-31-2014

Hi,

I'm using PE to access SPI slave.

The problem is that I would like to know which byte is the first after CS goes low.

As far as I saw, PE doesn't support such a feature, it just receives bytes from the SPI and accumulates them.

Also looking at the SPI datasheet, didn't see that such an option is supported by the hardware.

I need it to simplify communication synchronization, so that I'll be sure each time a new message is starting.

I'm using the MK11DN512VMC5 processor.

Am I missing something here?

Thanks, Isak.

daweiyou · ‎08-02-2014

Hi:

I find K12’s RM, there are some description for SPI slave

40.4.2.2 Slave mode

In SPI Slave mode the module responds to transfers initiated by an SPI bus master. It

does not initiate transfers. Certain transfer attributes such as clock polarity, clock phase,

and frame size must be set for successful communication with an SPI master. The SPI

Slave mode transfer attributes are set in the CTAR0 . The data is shifted out with MSB

first. Shifting out of LSB is not supported in this mode.

Dawei You（尤大为）

Mobile: +86 13675169919

isaklevinson · ‎08-02-2014

Hi Dawel,

Unfortunately, it doesn't help me.

I can successfully receive and transmit bytes by the SPI interface.

What I can't do, is to detect which of the received bytes is the first one in the frame (the firtst byte right after CS assertion).

It this supported in the SPI hardware, or will I have to do some "workearound tricks" to overcome it?

Thanks!

marek_neuzil · ‎08-10-2014

Hi Isak,

As was mentioned by Dawel, the SPI device does not support selection of MSB/LSB in the SLAVE mode. There is supported the MSB first (Most Significant Bit first) in the SLAVE mode only, see details below:

You can see, that the in the Slave mode (MSB only) the bit 7 (MSB – Most Significant Bit) is send after CS and the bit 0 (Least Significant Bit) is send as the last bit,

(for more details, see the reference manual K11P121M50SF4RM, http://cache.freescale.com/files/32bit/doc/ref_manual/K11P121M50SF4RM.pdf?fasp=1)