IMX6SOLO MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 PULL DOWN in U-Boot

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IMX6SOLO MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 PULL DOWN in U-Boot

154 Views
guillaume_costa
Contributor I

Hi,

 

I Want to set this pin in pull down mode during u-boot phase start-up to respect the display sequence power on. When I measure the signal, directly at the output of the PIN, it is in pull up state.

You can find here my u-boot dtsi configuration :

&iomuxc {

u-boot,dm-pre-proper;
pinctrl-names = "default";
pinctrl-0 = <&BOARD_InitPins>;

imx6s-board {

BOARD_InitPins: BOARD_InitPinsgrp { /*!< Function assigned for the core: Cortex-A9[ca9] */

fsl,pins = <
MX6QDL_PAD_EIM_DA0__SRC_BOOT_CFG00 0x0000B0B1
MX6QDL_PAD_EIM_DA1__SRC_BOOT_CFG01 0x0000B0B1

......


/*RGB PINS*/
......
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x000130B0
........


};
};

If you have any idea.

Thank you for the help

 

Guillaume

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6 Replies

22 Views
xapore82
Contributor I

suggest to connect jtag debugger and toggle pin (configure as gpio), probably it is shorted to

other signal. Bedside Tables

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142 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Guillaume

 

dtsi configuration looks as correct, reason may be that lcd has internally more strong pull-up

resistor than i.MX6S 100K Ohm pull down.

 

Best regards
igor

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115 Views
guillaume_costa
Contributor I

I made the test without the screen plugged, so without any possible pull up resistor connected to the screen, The signal output is pull up even with the screen not plugged.

Guillaume

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110 Views
igorpadykov
NXP TechSupport
NXP TechSupport

suggest to connect jtag debugger and toggle pin (configure as gpio), probably it is shorted to

other signal.

 

Best regards
igor

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105 Views
guillaume_costa
Contributor I

Hi Igor,

 

I forgot to mention that the screen is operational.

The images are displayed correctly on the screen. It is only when u-boot starts that the HSYNC signal is high and this affects the screen's power-on sequence. We also have the same problem on another processor: IMX6ULL. The routing of the board is correct.


Three signals are in bad state at boot time (during u-boot) DI0_PIN2 (HSYNC), DI0_PIN3 VSYNC, and DI0_PIN15 (RGB_DEN). All these pins must be in pull down mode but they are pull up.

 


These 3 pins are configured in pull down mode in u-boot in the iomuxc node:

 

&iomuxc {

 

u-boot,dm-pre-proper;
pinctrl-names = "default";
pinctrl-0 = <&BOARD_InitPins>;

 

imx6s-board {

 

BOARD_InitPins: BOARD_InitPinsgrp { /*!< Function assigned for the core: Cortex-A9[ca9] */

 

fsl,pins = <

 

MX6QDL_PAD_EIM_DA0__SRC_BOOT_CFG00 0x0000B0B1

 

.......

 

MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x000130B0
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x000130B0
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x000130B0
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x000130B0

 

>;
};

guillaume_costa_0-1637845897427.png

 

Best regards

Guillaume

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126 Views
guillaume_costa
Contributor I

Thank you for the answer.

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