I have p4080ds board and two question about it. First one, Is there any relationship between 24-27 bits SCY and 29-30 bits TRLX-ETHR in ELBC_ORg0 register? I think these are related to NOR FLASH read acces time. Second when I set 24-27 bits to 1011 the board does not boot. When I set 24-27 bits to 1100 the board does boot. What is the reason for that? How I can set 24-27 bits to 0000 such that the board can boot?
> How I can set 24-27 bits to 0000 such that the board can boot?
This is impossible because the GPCM read operation shoud implement a delay to wait for the NOR Flash data.
Please refer to the NOR Flash Data Sheet and P4080 QorIQ Multicore Communication Processor Reference Manual, 18.104.22.168 GPCM read signal timing.