How to get P2020 DMA over PCIe to transmit more than one data byte per packet?

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How to get P2020 DMA over PCIe to transmit more than one data byte per packet?

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toddreed
Contributor I

We have adjusted the BWC (Bandwidth/pause control bits of DMA mode register), but haven't seen any change.  We always get one data byte.  Thank you.

Todd

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LPP
NXP Employee
NXP Employee

Please check the value of DMAx_MRn[DAHE,SAHE] (RM Section 13.3.1).

Probably, you are trying to DMA data to FPGA register on the PCIe side of DMA. DMA doesn't burst if DAHE,SAHE != 0.

The source/destination transaction size calculations provided in RM Section 13.4.1.1 is only applicable to the case of DAHE,SAHE = 0.


Have a great day,
Pavel

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437 次查看
LPP
NXP Employee
NXP Employee

Please check the value of DMAx_MRn[DAHE,SAHE] (RM Section 13.3.1).

Probably, you are trying to DMA data to FPGA register on the PCIe side of DMA. DMA doesn't burst if DAHE,SAHE != 0.

The source/destination transaction size calculations provided in RM Section 13.4.1.1 is only applicable to the case of DAHE,SAHE = 0.


Have a great day,
Pavel

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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