Fsl P1020rdb board: After hard reset all the registers are getting reset. How to store the last reset cause i.e POR or Watchdog Reset? How to do soft reset in uboot 2011-12 for p1020rdb board?

cancel
Showing results for 
Search instead for 
Did you mean: 

Fsl P1020rdb board: After hard reset all the registers are getting reset. How to store the last reset cause i.e POR or Watchdog Reset? How to do soft reset in uboot 2011-12 for p1020rdb board?

403 Views
jeypatel
Contributor I

Hi ,

I am using freescale p1020rdb board and freescale provided uboot 2011-12 for the same board.

I want to store the reset cause of last time.

I want to verify that the board is reset due to "POR" or "Watchdog triggered reset"?

From the reference manual I thought  GUTS_MCPSUMR, GUTS_AUTORSTSR, GUTS_RSTRSCR register should contain the reset reason,

however when I printed in  Uboot source code, it was 0 after reset.

How can i find out the reason of the status register not updating.

From e500 manual I found that after hard reset all the above registers will be reset.

So my thought is, instead of hard-reset I will do soft reset  and can get the reason for reset.

Can someone provide me uboot sample code for soft reset?

Thanks & regards,

Jey

0 Kudos
1 Reply

139 Views
Pavel
NXP TechSupport
NXP TechSupport

The SRESET assertion produces soft reset of the P1020.

The GUTS_MCPSUMR register summarizes some of the sources of a pending machine check interrupt. This register cannot be used for detection of the reset source.

This register is used for detection of the SRESET assertion.

If the e500 watchdog timer is configured for machine check generation, the GUTS_MCPSUMR register can be used for Machine check exception from watchdog timer. See the TCR[WRC] bits.

If the P1020 watchdog is configured for HRESET_REQ assertion, there is the following recommendation.

If HRESET_REQ is connected to HRESET using some logic on board, the SoC will be reset. After HRESET, no status will be preserved.

The customer may implement some delay between HRESET_REQ and HRESET on board. This will give cpu enough time to service watchdog exception and write something on flash or DDR to preserve the status.


Have a great day,
Pavel

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos