[S32R294] Is there any official inter-process communication's example on SDK?

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[S32R294] Is there any official inter-process communication's example on SDK?

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Gordon_Yang
Contributor III

Because I would like to use IPC on s32r294 between Z4 and two Z7s, is there any official inter-process communication's example on SDK for this?

Or any other chipsets' example could be found? Thanks.

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lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi Gordon,

there's no such example but you can take a look at this thread:

https://community.nxp.com/t5/MPC5xxx/MPC5748G-dual-core-projects-only-work-when-using-the-first-and/...

You can see there how to create shared segment in the linker files. Just make sure that the segment is initialized due to ECC by startup files. Startup files use symbols from linker file to know the start address and size of RAM. Each core then initializes own RAM area. You can change the symbols in linker file for boot core to initialize also this shared segment.

Next point - I recommend to configure shared RAM as cache inhibited. This can be done by SMPU. You can find SW example for SMPU here:

c:\NXP\S32DS_Power_v2.1\S32DS\software\S32_SDK_S32R294_RTM_1.0.0\examples\S32R294\driver_examples\system\smpu_protection\

And if it is necessary to ensure data coherency, you can use semaphores:

c:\NXP\S32DS_Power_v2.1\S32DS\software\S32_SDK_S32R294_RTM_1.0.0\examples\S32R294\driver_examples\system\sema42_multicore\

Regards,

Lukas

 

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lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi Gordon,

there's no such example but you can take a look at this thread:

https://community.nxp.com/t5/MPC5xxx/MPC5748G-dual-core-projects-only-work-when-using-the-first-and/...

You can see there how to create shared segment in the linker files. Just make sure that the segment is initialized due to ECC by startup files. Startup files use symbols from linker file to know the start address and size of RAM. Each core then initializes own RAM area. You can change the symbols in linker file for boot core to initialize also this shared segment.

Next point - I recommend to configure shared RAM as cache inhibited. This can be done by SMPU. You can find SW example for SMPU here:

c:\NXP\S32DS_Power_v2.1\S32DS\software\S32_SDK_S32R294_RTM_1.0.0\examples\S32R294\driver_examples\system\smpu_protection\

And if it is necessary to ensure data coherency, you can use semaphores:

c:\NXP\S32DS_Power_v2.1\S32DS\software\S32_SDK_S32R294_RTM_1.0.0\examples\S32R294\driver_examples\system\sema42_multicore\

Regards,

Lukas

 

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Gordon_Yang
Contributor III

Hi Lukas,

Thanks for your suggestion.

 

Sincerely,

Gordon.

 

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