Endianness of S32K144

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Endianness of S32K144

ソリューションへジャンプ
1,892件の閲覧回数
oeren5
Contributor III

Hi everybody,

I am using S32K144 with MBDt v4.2. I am using CAN blocks in order to send and receive data. I want to learn what is the endianness format of CAN blocks?

Is it little endian or big endian? Also, are there any way to change this format in configuration block or the format is fixed?

Thanks in advance.

0 件の賞賛
1 解決策
1,864件の閲覧回数
dianabatrlova
NXP TechSupport
NXP TechSupport

Hello,

 

The Cortex-M has the AIRCR register where the ENDIANNESS bit is fixed as little endian for S32K1xx devices. FlexCAN register also uses a little endian and it cannot be changed.

However, I would like to suggest focusing on the "55.4.3 Message buffer structure" in RM rev 12.1

 

Best regards,

Diana

元の投稿で解決策を見る

0 件の賞賛
1 返信
1,865件の閲覧回数
dianabatrlova
NXP TechSupport
NXP TechSupport

Hello,

 

The Cortex-M has the AIRCR register where the ENDIANNESS bit is fixed as little endian for S32K1xx devices. FlexCAN register also uses a little endian and it cannot be changed.

However, I would like to suggest focusing on the "55.4.3 Message buffer structure" in RM rev 12.1

 

Best regards,

Diana

0 件の賞賛