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Hello,
SRR and IDE bits are separated in control register.
ID register bits 28-18 are to be set with standard ID bits 10-0 (most significant is highest).
ID register bits 28-0 are to be set with extended ID bits 28-0 (most significant is highest).
Parameter identifier of the function FLEXCAN_Tx_message() should always contain the ID bits in its lowest bits (starting from bit 0).
The best source is the source code and header files for FlexCAN peripheral.
Regards,
PetrM
Hello,
SRR and IDE bits are separated in control register.
ID register bits 28-18 are to be set with standard ID bits 10-0 (most significant is highest).
ID register bits 28-0 are to be set with extended ID bits 28-0 (most significant is highest).
Parameter identifier of the function FLEXCAN_Tx_message() should always contain the ID bits in its lowest bits (starting from bit 0).
The best source is the source code and header files for FlexCAN peripheral.
Regards,
PetrM