MSP5746C SPI CS not working

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MSP5746C SPI CS not working

768 Views
cholland
Contributor V

I give up. No matter what I try to do, I just can't seem to drive chip select low.

I can see the SPI_CLK and SPI_SOUT signals and they look perfect.

I know the pin is working. I used it as a gpio.

(The SPI is configured as a master. There are no reply messages, just an LCD screen)

(The development board is the EVB Board https://www.nxp.com/docs/en/user-guide/MPC5748GEVBUG.pdf )

void DSPI3_pin_init(void)

{

SIUL2.MSCR[PG3].R = 0;       /* Pad PG3: Clear Register */
SIUL2.MSCR[PG3].B.SSS = 0x2; /* Pad PG3: Source signal is DSPI_3 CS0 */
SIUL2.MSCR[PG3].B.OBE = 0x1; /* Pad PG3: Output Buffer Enable */

}

#define DSPI_MCR_PCSSSE 0x00000000

#define DSPI_MCR_PCSSSE 0x02000000
#define DSPI_MCR_PCSIS0 0x00010000
#define DSPI_MCR_PCSIS1 0x00020000
#define DSPI_MCR_PCSIS2 0x00040000
#define DSPI_MCR_PCSIS3 0x00080000
#define DSPI_MCR_PCSIS4 0x00100000
#define DSPI_MCR_PCSIS5 0x00200000
#define DSPI_MCR_HALT 0x00000001
#define DSPI_MCR_MSTR 0x80000000


void DSPI3_init(void)
{
DSPI_3.MCR.R = DSPI_MCR_MSTR | DSPI_MCR_PCSSSE | DSPI_MCR_PCSIS0 | DSPI_MCR_PCSIS1 | DSPI_MCR_PCSIS2 | DSPI_MCR_PCSIS3 | DSPI_MCR_PCSIS4 | DSPI_MCR_PCSIS5 | DSPI_MCR_HALT; 
DSPI_3.MODE.CTAR[0].R = 0x48021004; /* Configure CTAR0 */
DSPI_3.MCR.B.HALT = 0x0; /* Exit HALT mode: go from STOPPED to RUNNING state*/
DSPI_3.SR.R = 0xFCFE0000; /* Clear ALL status flags by writing 1 to them */

}

#define PUSHR_EOQ 0x08000000ul

#define PUSHR_PCS0 0x00010000ul
#define PUSHR_PCS1 0x00020000ul
#define PUSHR_PCS2 0x00040000ul
#define PUSHR_PCS3 0x00080000ul
#define PUSHR_PCS4 0x00100000ul
#define PUSHR_PCS5 0x00200000ul
#define PUSHR_CONT 0x00000000ul

void SomeWriteFunction(void)

{

DSPI_3.SR.R = 0xBEFF0000; /* Clear ALL status flags by writing 1 to them */

/* Try to set every CS line, but none of them are going low */

DSPI_3.PUSHR.PUSHR.B.TXDATA = FUNCTION_SET | FUNCTION_SET_DL | PUSHR_EOQ | PUSHR_PCS0 | PUSHR_PCS1 | PUSHR_PCS2 | PUSHR_PCS3 | PUSHR_PCS4 | PUSHR_PCS5;
}

Thank you,

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4 Replies

599 Views
lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi,

there's an example in application note AN4830:

https://www.nxp.com/docs/en/application-note/AN4830.pdf

https://www.nxp.com/webapp/Download?colCode=AN4830SW

DSPI_3 and CS0 is used in the example, so it's exactly the same configuration. Could you try if this code works for you?

Regards,

Lukas

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599 Views
cholland
Contributor V

Hi Lukas,

That's the example I took from.

The problem is that there is no 'other chip' to select.

It took me a while to figure out that I had to clear the status flags before or after a transmission, still not sure which.

I'm not sure what I am doing wrong. If the example CS is supposed to work correctly, then It has to be on my end.

I was hoping that maybe somebody would say 'oh yeah, you have to..."

Thanks,

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599 Views
lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi Christopher,

yes, the example from the AN is working. To be sure, I did quick test on my board - I just checked the master signals, I did not connect it to slave. The chip select is working as expected.

pastedImage_1.png

Before writing data to PUSH register, you should check if the buffer is not full (TFFF flag).

When reading data, you should check if the data are already received (RFDF flag).

After reading of received data, clear flags TCF, RDRF and EOQ (if used). Also an error flags can be set - overflow or underflow.

Regards,

Lukas

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599 Views
cholland
Contributor V

Thanks for your help. If it works on your end, it must be me. I'll do that check of the buffer full flag and let you know the results. 

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