MPC5777C ISR pending

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MPC5777C ISR pending

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jongminna
Contributor III

160045_160045.pngq1.pngHi, Everyone

 

I have a problem about MPC5777C's ISR.

First of all, My System is

 

MCU : MPC5777C

OS : ETAS RTA OS (AUTOSAR OS 4.0.2)

Compiler : WindRiver Diab 5.9.4.0

Interrupt vector mode : Hardware Vector mode

Timer for OS tick counter : PIT2

Timer for our own API(just tick counter) : PIT RTI

 

I have configured ISRs. PIT2 is Category 2, RTI is Category 1.

 PIT2 is controlled by OS API and RTI is controlled by my code.

RTI TIF is cleared in this code.

160044_160044.pngpastedImage_1.png

 

 

But, When above ISR code excuted once, PIT2 is pending(It means all of OS tasks pending, not working) and RTI Interrupt is not cleared even if executed TIF clear code( same as CLEAR_PENDING_INTERRUPT_RTI() ).

 

For figure out this problem, I did try many things.

If RTI ISR is configured as Category 2 ISR, Then PIT and RTI ISR work well, There are no problem.

But I have to use RTI ISR as Category 1 ISR.

 

Another solution, (I don't know that this solution is correct)

Clear the INTC PRC_CPR0 register with 0.

It looks work well, but It is so weired.

 

 

 

Please give me a solution or verity my temporary solution.

Thanks.

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

"PIT2 is controlled by OS API and RTI is controlled by my code."

If you use interrupts in AUTOSAR OS, they are handled with OS. Do not mix them with handlers written by yourself.

You must write the AUOTSAR compliant handler, or use the handler implemented in OS.

Try to handle both interrupts via OS and you have no issue.

Peter

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jongminna
Contributor III

Thank you for your answer.

RTI is alos configured by RTA OS Config tool and managed by OS.

"controlled by my code."" means TIF cleared by my code such as  PIT.RTI.TFLG.B.TIF = 1;

So I think this method is reasonable thing.

Please give me more advise.

Thanks.

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