I have a problem with module FlexCAN on MPC5777C.
I just work with MPC5566 and MPC5674 and I've develop same source code for any device.
I hope to mantain the compatibility with CAN modules present in MPC5674 and MPC5566 devices, here the decision ti maintain unchanged the configuration.
Atteched two documents which I describe below:
1) FlexCAN - after soft reset
First document highlight the problem I found: impossibility to read some registers
- CAN_A_RXIMR0 → CAN_A_RXIMR3
- CAN_A_RXIMR5 → CAN_A_RXIMR6
- CAN_A_RXIMR8 → CAN_A_RXIMR37
In the other channels happens more or less the same (or better it doesn't conversely repeat registers) with in addition, for channels C and D, of register:
- CAN_X_RXMGMASK (which, instead, for channels A and B I read and write without problems).
In register CAN_MCR, IRMQ is disabled to deactivate management individual masks (CAN_A_RXIMRxx) promoting management of: RXMGMASK, RX14MASK, RX15MASK and RXFGMASK
In the second document it describes starting procedure, procedure adopted to set CAN modules of the other devices (MPC5674 ed MPC5566) with some owner fields of FlaxCAN module in reference.
Among these, at line 57 field WRMFRZ is activated of register CAN_CTRL2 to enable access in writing without restrictions set by default.
At the end of start up I obtain:
MCR and ESR1 show thar module is synchronized with the CAN and it's operative
From application I send 8 byte on mailbox: 5 obtaining:
CAN_MCR: 0x5980003F - FRZ – HALT - NOTRDY
CAN_ESR1: 0x00000002 – ERR.INT
Register CAN_RERRAR shows:
NCE: non-correctable error
SAID: Rx match
ERRADDR: 0x0528 which identifies injection address of register CAN_A_RX14MASK .
I have looked for further information on Freescale web page but I couldn't find any.
Original Attachment has been moved to: can.c.zip
The MPC5777C FlexCAN supports detection and correction of errors in memory read accesses.
Most probably the issue Paolo has is due to this feature that is enabled by default. The ECC error may have occurred due to module not being initialized properly or if the debugger is reading/displaying non initialized registers.
The ECC feature can be disabled by setting bit ECCDIS in CAN_MECR. Note that bit ECRWRDIS in the same register prevents writes to the register unless it is cleared first. Disabling ECC does not impact the normal operation of the FlexCAN.
I placed FlexCAN demo code tested on the MPC5777C EVB in the community; see
If the ECC reporting feature is enabled then all the memory positions from 0x0080to 0xADF must be initialized. See more in chapter 40.5.13 Detection and Correction of Memory Errors of the RM.
I placed another FlexCAN demo with ECC enabled; see https://community.nxp.com/docs/DOC-334350