Dear NXP Team,
Concerning MPC5775B/E, I have some doubts about using the message RAM o
the two MCAN CAN FD devices. Nowhere, I found the documentation of the
address at which the RAM is seen by the CPU. However, from your sample
code for the similar MPC5777, I got 0xFFE34000, and using the debugger, I
could prove that we here have a memory segment of exactly the documented
length (0x2600, 2432 words). So the base address is quite sure, but if you
could still confirm? Or tell, where I find it documented?
Secondary, from the documentation I read, it is not so clear, how the
address space is shared between the two devices. The sentence "each M_CAN
instance can address 1216 words in the Message RAM" (Ref. manual, 38.1.1,
p.1763) lets me think the RAM is cut in two identical halfs, each device
seeing just 0x1300. But then the question arises, which one uses which
base address? M_CAN_=0xFFE34000 and M_CAN_1=0xFFE35300?
The term "the Message RAM shared by the two M_CAN" (same location) seems
to indicate both would have the same base address and it were rather a
configuration matter to avoid conflicts. (By using accordingly differing
offsets in both devices for the FIFOs/queues/filters.)
If the latter is correct (which looks more reasonable to me), then I
wonder, why the documentation says "each M_CAN instance can address 1216
words"? Shouldn't it then be possible to spent more of the 0x2600 for one
device - on cost of less RAM for the other? Use case: One supporting RAM
consuming CAN FD, the other one only doing classic CAN?
Please explain it to me! Thanks a lot in advance.
Kind regards,
Peter
