MPC5746R - DMA on DSPI - Problem with INT_MAJOR

[demian91]

Hi, i configuring eDMA for DSPI_3 and i dont understand why when i active the bit INT_MAJOR of register "DMA_0.TCD[50].WORD_7" it works strange.
My Configuration is:

-DSPI_3:
MCR.B.MSTR = 1; (Master)
MCR.B.XSPI = 0;
MCR.B.CONT_SCKE = OFF;
MCR.B.DIS_TXF = 0; (FIFO Enable)
MCR.B.DIS_RXF = 0; (FIFO Enable)
CPOL = 0
CPHA = 0
BaudRate: 1MHz
tCSC, tASC and tDT are exagerated.
SR.B.TFFF = 1; (FLAG)

RSER.B.TFFF_RE = ON; (Enable interrupt or DMA)
RSER.B.TFFF_DIRS = 1; (Select DMA)

-I use the interrupt of DMA "Vector # 103 eDMA Channel 50 DMA_INTH[INT50]"

-Channel DMA: DMAMUX_3 -> DSPI_3 TX
DMAMUX_3.CHCFG[50].B.ENBL = ON;
DMAMUX_3.CHCFG[50].B.TRIG = 0;
DMAMUX_3.CHCFG[50].B.SOURCE = 9;

-General DMA: DMA_0
DMA_0.CR.B.CX = 0;
DMA_0.CR.B.ECX = 0;
DMA_0.CR.B.GRP3PRI = 3;
DMA_0.CR.B.GRP2PRI = 2;
DMA_0.CR.B.GRP1PRI = 1;
DMA_0.CR.B.GRP0PRI = 0;
DMA_0.CR.B.ERGA = 0; //Fixed Channel
DMA_0.CR.B.ERCA = 0; //Fixed Channel
DMA_0.CR.B.EMLM = 0; //NBYTES[32 BITS]

-Priorities: All channels with a unique priority
DMA_0.DCHPRI[Channel].B.CHPRI = Channel;

-Channel DMA: TCD
DMA_0.DCHPRI[CanalX].B.ECP = 0; //No suspend or can suspend
DMA_0.DCHPRI[CanalX].B.DPA = 0;

-SADDR: Buffer of registers [DSPI_PUSHR_PUSHR_tag]
-DADDR: DSPI_3.PUSHR.PUSHR.R

-SMOD: 9 (128 bytes of buffer[DSPI_PUSHR_PUSHR_tag])
-SOFF: 4
-SSIZE: 2 (32-bit)
-SLAST: 0

-DMOD: 0
-DOFF: 0
-DSIZE: 2 (32-bit)
-DLAST: 0

-DREQ: 1 (Disable ERQ[Channel] after Transfer)
-INT_MAJOR: 1 (Interrupt when finalize Iteration, when CITER = 0)

-No Linker of channels

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When i start a DMA Transfer:

DMA_0.CERQ.R = CanalX;
          DMA_0.TCD[CanalX].WORD_0.B.SADDR = AddressX; //Address = &Buffer(of DSPI_PUSHR_PUSHR_tag)[0]
          DMA_0.TCD[CanalX].WORD_2.NBYTES.B.NBYTES = NBytesX;
          DMA_0.TCD[CanalX].WORD_7.B.BITER = CiterX;
          DMA_0.TCD[CanalX].WORD_5.B.CITER = CiterX;
//Activate Interrupt
DMA_0.CINT.R = 50; //Flags (INTL y INTH)
DMA_0.TCD[CanalX].WORD_7.B.INT_MAJOR = 1;
DMA_0.TCD[CanalX].WORD_7.B.INT_HALF = 0;
DMA_0.SERQ.R = CanalX;
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In the interrupt i write:
void SPITransmitComplete_DMAInterrupt()
{
          PIN_CONMUTAR(SIUL2_TESTGPIO_5)
          DMA_0.CINT.R = PORTDMA4TFT_TX; //Flags (INTL y INTH)
          return;
}
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In the images that adjunt, the blue is the pin SCK, the yellow is the pin that conmutes when enters in the interrupt "SPITransmitComplete_DMAInterrupt()".

If i Set:
-NBytesX: 4
-CiterX: 12
I have the result in 1.jpg

If i Set:
-NBytesX: 80
-CiterX: 1
I have the result in 2.jpg

If i Set:

-NBytesX: 4
-CiterX: 3

i have the result in 3.jpg

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I understand that the interrupt of DMA for INT_MAJOR=1 is that interrupt when CITER=0 or when finish all the bytes to transfer, is it correct?

[PetrS]

Hi,

your understanding is correct, major interrupt is called after all transfers are done (CITER=0).

For your setting; the FIFO should be enabled when DMA is used, so clear DIS_RXF and DIS_TXF bits. You did no show RSER setting but lets assume it is right when some transfers are done.

Finally you should set the DMA in the way you will transfer single word (32bit) per one request, thus you should have the first configuration, i.e. NBytes = 4, CiterX= 12.

BR, Petr