Hi All I able to initialize fir M_CAN_1 for mpc5777m and able to transmit and receive. what are the things should taken care for initializing M_CAN_2 or it is same as like M_CAN_1,I did same initialize like M_CAN_1, But I am confused with assigning memory locations like start address of ID filter elements,TX Buffer and RXFIFOs,
Because All M_CAN will use the same Message RAM in MPC 5777M.
Can any one help me how to initialize memory address for M_CAN_2.
These are my memory addresses for M_CAN_1
#define MCAN_MSG_RAM_BASE_ADDR 0xFFED4000 // base address of shared MSG RAM
#define MCAN_MSG_RAM_LENGTH 0x4000
M_CAN_1.SIDFC.R = 0x00010000; // Configuring One Standard ID filters and its offset address.
M_CAN_1.TXBC.R = 0x00020300; // Setting up 2 Tx Buffers, Transmit Buffer Offset Address
M_CAN_1.RXF0C.R = 0x80020100; // Setting up 2 Rx FIFO 0 with overwrite new messages when fifo full and its offset address.
M_CAN_1.RXF1C.R = 0x00020200; // Setting up 2 Rx FIFO 1 with discard new messages when fifo full and its offset address
Can use same thing for M_CAN_2 or else what needs to be change.
Hi,
The offset address of TX/RX buffers and RX FIFOs should be unique. I think the ID filter elements could be shared, but this way the ID matching scheme will be the same for both modules. Not sure if it is usable. Thus set the base addresses of ID filters separately. So you can have e.g.
M_CAN_2.SIDFC.R = 0x00010500; // Configuring One Standard ID filters and its offset address (0x500).
M_CAN_2.TXBC.R = 0x00020800; // Setting up 2 Tx Buffers, Transmit Buffer Offset Address (0x800).
M_CAN_2.RXF0C.R = 0x80020600; // Setting up 2 Rx FIFO 0 with overwrite new messages when fifo full and its offset address (0x600)..
M_CAN_2.RXF1C.R = 0x00020700; // Setting up 2 Rx FIFO 1 with discard new messages when fifo full and its offset address (0x700).
BR, Petr