FlexCAN on MPC5777C stalls

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FlexCAN on MPC5777C stalls

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433 次查看
Peter15
Contributor II

Hello,

I have a problem when initialisating the FlexCAN module for reception:

When a CAN ID containing less than 8 data bytes is received as the first message after power up in a message buffer, it is received (once) and all subsequent messages are not received anymore.

The FlexCAN module enters freeze mode.
The event is observed when sending a 4 bytes message after powering the CPU and after complete SW initialisation of the FlexCAN module.

In case a CAN message with 8 data bytes is received first, the problem does not occur and subsequent messages (also those with less than 8 data bytes) are received correctly.

Does anybody has observed this problem or may deliver an approach to solve it?

Kind regards, Peter

 

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425 次查看
PetrS
NXP TechSupport
NXP TechSupport

Hi,

the MPC5777C FlexCAN supports detection and correction of errors in memory read accesses.
Most probably the issue is due to insufficient FlexCAN memory initialization if this feature is enabled (by default), here, I think, due to missing SMB registers initialization. When module read it during move-in process, ECC is detected by module and it enters Freeze mode. 

The ECC feature can be disabled by setting bit ECCDIS in CAN_MECR.  Note that bit ECRWRDIS in the same register prevents writes to the register unless it is cleared first.  Disabling ECC does not impact the normal operation of the FlexCAN. 

I placed FlexCAN demo code tested on the MPC5777C EVB in the community; seehttps://community.nxp.com/docs/DOC-332326.

If the ECC reporting feature is enabled then all the memory positions from 0x0080to 0xADF must be initialized. See more in chapter 40.5.13 Detection and Correction of Memory Errors of the RM.
I placed another FlexCAN demo with ECC enabled; see https://community.nxp.com/docs/DOC-334350

BR, Petr

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416 次查看
Peter15
Contributor II

Hello Petr!

 

Thanks for your answer! This indeed resolves my problem. You were right, I use ECC and at the same time did not initialise the "hidden" registers. By doing this, the problem has disappeared. Thousands thx!

 

Kind regards, Peter

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426 次查看
PetrS
NXP TechSupport
NXP TechSupport

Hi,

the MPC5777C FlexCAN supports detection and correction of errors in memory read accesses.
Most probably the issue is due to insufficient FlexCAN memory initialization if this feature is enabled (by default), here, I think, due to missing SMB registers initialization. When module read it during move-in process, ECC is detected by module and it enters Freeze mode. 

The ECC feature can be disabled by setting bit ECCDIS in CAN_MECR.  Note that bit ECRWRDIS in the same register prevents writes to the register unless it is cleared first.  Disabling ECC does not impact the normal operation of the FlexCAN. 

I placed FlexCAN demo code tested on the MPC5777C EVB in the community; seehttps://community.nxp.com/docs/DOC-332326.

If the ECC reporting feature is enabled then all the memory positions from 0x0080to 0xADF must be initialized. See more in chapter 40.5.13 Detection and Correction of Memory Errors of the RM.
I placed another FlexCAN demo with ECC enabled; see https://community.nxp.com/docs/DOC-334350

BR, Petr

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