FRDM-MCXN947 - LPUART With PLL0 CLK

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FRDM-MCXN947 - LPUART With PLL0 CLK

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John_Adams
Contributor I

Hello,
I am trying to use LPUART on FRO_HF (48MHz) with baudrate 320400, but MCUs with interrupt are not able to receive all characters, so there are frequent communication failures. How is it possible to connect to LPUART a clock from PLL0 running at 150MHz? Is it necessary to configure PLL0 somehow?

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EdwinHz
NXP TechSupport
NXP TechSupport

Hi @John_Adams,

I believe this is a duplicated community post from the one seen here: UART Setup on FRDM-MCXN947 - NXP Community

In order to prevent double efforts, I will continue supporting you on the aforementioned post.

Have a nice day.

BR,
Edwin. 

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EdwinHz
NXP TechSupport
NXP TechSupport

Hi @John_Adams,

I believe this is a duplicated community post from the one seen here: UART Setup on FRDM-MCXN947 - NXP Community

In order to prevent double efforts, I will continue supporting you on the aforementioned post.

Have a nice day.

BR,
Edwin. 

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