Below is the present code that is working with 32 bit entries for the SPI DMA. There's a switch, DMA_16, which is where I tried 16 bit entries. The DMA is transferring from RAM, 32 bit entries or attempted 16 bit entries, to SPI8/FLexComm8 which is the high speed SPI.
void DMA0init( void )
{
// Turn off spi timer, and disable DMA0
haltDMATrigger( );
DMA0->CTRL = 0UL; // Disable DMA0
// Get input mux up and running, apply clocks, reset, etc.
INPUTMUX_Init( INPUTMUX );
// CTimer2 match 0 is trigger input
INPUTMUX->DMA0_ITRIG_INMUX[3] = 8;
// Enable clocks to, reset, then enable DMA0
DMA_Init( DMA0 );
// Set up DMA0 channel 3
DMA_EnableChannel( DMA0, DMA0_CHANNEL_3 );
/* Fill in DMA0_CH3_Handle handle */
DMA_CreateHandle( &DMA0_CH3_Handle, DMA0, DMA0_CHANNEL_3 );
// Set up when done
DMA_SetCallback( &DMA0_CH3_Handle, DMA_Callback, NULL );
/* Enable the DMA on channel 3 in the DMA */
DMA_EnableChannel( DMA0, DMA0_CHANNEL_3 );
// This will start the trigger(s), when enabled
startSpiTimer( );
}
/*
* Will start the DMA engine to transfer data, pointed to with input parameter
* srcBuffer. The number of SPI transfers is also passed in with input parameter
* N_spiTransfers. N_spiTransfers is number of transfers, not bytes.
* The user can monitor when the DMA process is done, ie. all the data has been
* transfered, by calling dmaIsActive( ) or place a callback in DMA0_IRQHandler( )
*/
#if DMA_16
void startDMA0Transfer( uint16_t *srcBuffer, uint32_t N_spiTransfers )
{
// Sanity check
if( 0 == N_spiTransfers )
{
return;
}
// Set up upper control lines
*(uint16_t *)((&(SPI8->FIFOWR))+2UL) = UPPER_FIFO_DMA >> 16;
DMA_PrepareChannelTransfer( &dmaConfig, /* dma_channel_config_t that gets filled in */
srcBuffer, /* Pointer to source of data to output */
(void *)&(SPI8->FIFOWR), /* Destination address */
/* DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes) */
DMA_CHANNEL_XFER(false, true, true, false, kDMA_Transfer16BitWidth, kDMA_AddressInterleave1xWidth, kDMA_AddressInterleave0xWidth, (N_spiTransfers*2UL) ),
kDMA_MemoryToPeripheral, /* Reading from srcBuffer, writing to SPI8->FIFOWR */
&dmaChan3Trigger, /* Pointer to how the trigger is hangled */
NULL ); /* Pointer to any data to be used in callback */
#else
void startDMA0Transfer( uint32_t *srcBuffer, uint32_t N_spiTransfers )
{
// Sanity check
if( 0 == N_spiTransfers )
{
return;
}
DMA_PrepareChannelTransfer( &dmaConfig, /* dma_channel_config_t that gets filled in */
srcBuffer, /* Pointer to source of data to output */
(void *)&(SPI8->FIFOWR), /* Destination address */
/* DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes) */
DMA_CHANNEL_XFER(false, true, true, false, kDMA_Transfer32BitWidth, kDMA_AddressInterleave1xWidth, kDMA_AddressInterleave0xWidth, (N_spiTransfers*4UL) ),
kDMA_MemoryToPeripheral, /* Reading from srcBuffer, writing to SPI8->FIFOWR */
&dmaChan3Trigger, /* Pointer to how the trigger is hangled */
NULL ); /* Pointer to any data to be used in callback */
#endif
DMA_SubmitChannelTransfer( &DMA0_CH3_Handle, &dmaConfig );
// Start the request for a DMA
DMA_StartTransfer( &DMA0_CH3_Handle );
// This will start the trigger(s)
SPI8->FIFOCFG |= SPI_FIFOCFG_DMATX_MASK;
DMA0->CTRL = 1UL; // Enable DMA0
startSpiTimer( ); // Clear residual trigger and start timer
}
