Lx2160 uart1(21d0000) baud rate set to 9600 is not working

[norman_hsu]

Hi NXP support team,

We have a Lx2160a customize board.

We want to modify the DT to enable uart1(21d0000) for a GPS ToD NMEA message input:

&uart0 {

status = "okay";  // default stdout  115200

};

&uart1 {

current-speed = <9600>;

status = "okay";

};

&uart2 {

status = "disabled";

};

&uart3 {

status = "disabled";

};

After loading the image, we can see a new /dev/ttyAMAx device as below:

root@localhost:~# ls -l /dev/ttyAMA1
crw-rw---- 1 root dialout 204, 65 Mar 27 17:54 /dev/ttyAMA1

We can get GPS message by using another console board connect to GPS Txd directly.

But we can't get any message by using command "cat /dev/ttyAMA1"

Is anything we missing ?

thanks for your support

[kenli]

This patch may help:

Subject: [PATCH] arm64: dts: lx2160: fix uart2/3/4 can not work issue

---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 2fe86aca32da..e316bb09f7a1 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -894,26 +894,29 @@
};

uart1: serial@21d0000 {
- compatible = "arm,sbsa-uart","arm,pl011";
+ compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0x21d0000 0x0 0x1000>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- current-speed = <115200>;
+ clocks = <&clockgen 4 7>, <&clockgen 4 7>;
+ clock-names = "uart", "apb_pclk";
status = "disabled";
};

uart2: serial@21e0000 {
- compatible = "arm,sbsa-uart","arm,pl011";
+ compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0x21e0000 0x0 0x1000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
- current-speed = <115200>;
+ clocks = <&clockgen 4 7>, <&clockgen 4 7>;
+ clock-names = "uart", "apb_pclk";
status = "disabled";
};

uart3: serial@21f0000 {
- compatible = "arm,sbsa-uart","arm,pl011";
+ compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0x21f0000 0x0 0x1000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- current-speed = <115200>;
+ clocks = <&clockgen 4 7>, <&clockgen 4 7>;
+ clock-names = "uart", "apb_pclk";
status = "disabled";
};

--

[Lori1]

Hi,

We also met the "Lx2160 uart1(21d0000) baud rate set to 9600 is not working".
1 We have modified the DTS

&uart0 {

status = "okay";  

};

&uart1 {

current-speed = <9600>;

status = "okay";

};

2.  devmem 0x21d0030 32 0x00000B01

3. We have add above patch in u-boot to configure UART2 as well. 

After that, we also cannot set to baud rate 9600 in Lx2160 uart1(21d0000). Please help to  provide the suggestion what we missed. 

Thank you

[yipingwang · Accepted solution]

I checked LSDK 21.08 image, and check UART registers and see it is observed that UART is NOT enabled.

root@TinyLinux:~# devmem 0x21d0030 32
0x00000300
root@TinyLinux:~# devmem 0x21c0030 32
0x00000B01

You could configure UART register manually from Linux shell.

root@TinyLinux:~# devmem 0x21d0030 32 0x00000B01

I have created a temporary patch in u-boot to configure UART2 as well. Please review.

diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 2a5f256184..38ee06807c 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -28,7 +28,10 @@ static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
 static enum pl01x_type pl01x_type __attribute__ ((section(".data")));
 static struct pl01x_regs *base_regs __attribute__ ((section(".data")));
 #define NUM_PORTS (sizeof(port)/sizeof(port[0]))
-
+#else
+#define NXP_ENABLE_ADDITIONAL_UART
+static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
+static struct pl01x_regs *base_regs __attribute__ ((section(".data")));
 #endif
 
 static int pl01x_putc(struct pl01x_regs *regs, char c)
@@ -280,6 +283,10 @@ int pl01x_serial_setbrg(struct udevice *dev, int baudrate)
 	if (!plat->skip_init) {
 		pl01x_generic_setbrg(priv->regs, priv->type, plat->clock,
 				     baudrate);
+#ifdef NXP_ENABLE_ADDITIONAL_UART
+    base_regs = (struct pl01x_regs *)port[1];
+    pl01x_generic_setbrg(base_regs, priv->type, plat->clock, baudrate);
+#endif
 	}
 
 	return 0;

[smuthusamy]

We have same requirement, but the issue is not resolved even with this patch.