We are developing a UART driver for LX2160ARDB_rev2.
I am using "platform clk" to calculate the baud rate, but I don't know how to get it on SW.
It is known from the U-boot source code that the platform clk is a bus clock, and it is known from RCW and U-boot that the bus clock is 750 MHz.
Based on this value, you can pre-calculate and hold it as a constant, but it is smarter to get it from a register and calculate it.
However, there is no mention of platform clk in the "QorIQ LX2160A Reference Manual Supports LX2120A and LX2080A", so I don't know where I can get it from.
Is it easy to get a platform clk, or even a bus clock?
Solved! Go to Solution.
Refer to the QorIQ LX2160A Reference Manual, 4.10 IP Logic Clock Distribution and Configuration to see:
1) Platform PLL is controlled by RCW[SYS_PLL_RAT]
2) Platform clock is Platform PLL / 2
3) UART is clocked by Platform clock / 4.
Refer to the RM, 9.3.1.13 Reset Configuration Word Status Register 1 (RCWSR1) to obtain the SYS_PLL_RAT value.
Refer to the QorIQ LX2160A Reference Manual, 4.10 IP Logic Clock Distribution and Configuration to see:
1) Platform PLL is controlled by RCW[SYS_PLL_RAT]
2) Platform clock is Platform PLL / 2
3) UART is clocked by Platform clock / 4.
Refer to the RM, 9.3.1.13 Reset Configuration Word Status Register 1 (RCWSR1) to obtain the SYS_PLL_RAT value.