LX2080 - PCIe compliance mode - set speed to 5Gbit/s or 8Gbps

[muaxi8]

I now have the same problem as the post below:

https://community.nxp.com/t5/Layerscape/LS1046A-PCIe-compliance-mode-set-speed-to-5Gbit-s/m-p/809940

My LX2080 is currently in RC mode, I did the following operation but could not see the 5Gbps signal，

I wonder if LX2080 supports Compliance? How do I configure it ？

1. do a Read-Modified-Write configure write to PEX controller's Configure Space Link Control 2 Register. Please do not touch other bits except the following:
    a. Set the Target link speed bit field (T_LS) to the desired speed (0x2).
    b. Set the Enter Compliance (EC) bit

[ufedor]

Which PCIe controller compliance is tested?

Please provide a block diagram of the PCIe link.

If a live link partner is the PCIe link second party, then provide U-Boot booting log as text attachment.

[muaxi8]

There is no link for the pcie signal integrity test。Signal integrity testing has nothing to do with the pcie

link，I need to test Compliance now, but after compliance is configured, the rate cannot reach 5G。

I can confirm that my pcie function is fine because I have tested the pcie function。

I need to test Compliance now, but after compliance is configured, the rate cannot reach 5G。

[ufedor]

PCI-SIG compliance testing board called CBB/CLB has to be used. Also live a link partner can be used.

Please describe your test configuration.

[muaxi8]

Yes I know, we tested pcie at a third party testing facility. The device is connected like this：

1. Now I want to know how to configure lX2080 pcie Compliance test.

2. blow picture is how I'm currently configured, Excuse me, this way is correct ?

3. Whether the CLB is recognized as an EP device

[ufedor]

> 2. blow picture is how I'm currently configured

Which exactly picture?

Please provide a diagram showing to which device/tool the LX2080 PCIe port is connected.

Do you use CLB?