Hi @Hmc510,
There are few possible reasons for the error as mentioned below:
- The training sequence that the controller follows to calibrate the read data path was not able to complete. This would probably only happen if there was a hard failure on the memory interface caused by board-level issues or incorrect controller settings.
- Incorrect termination of MDICx signals.
- Write leveling calibration was not able to complete. This relates to improper settings of the DDR_WRLVL_CNTL register or board-level issues.
Regards,
Mrudang