Hi !
In the reference manual of the LS1043a, table 6-4 "ICID connectivity", we see that the ICID for some masters is configurable in the SCFG (SATA, USB 1, 2, 3, eDMA, Debug path and sSDHC).
But it seems that some ICID are fixed: Fman, QMan/BMan, SEC, PCI Express 1, 2, 3 and qDMA are described as 'not configured through SCFG registers'.
Are these ICID values fixed ? If that's the case, what are the correct values to use?
If they are not fixed, how do we configure them ?
Best regards,
V.
已解决! 转到解答。
Have a great day,
If ICID for master is not configurable in the SCFG then you should look in corresponding document which describes block with that master. For example the SEC DMA can be configured to assert specified ICID values for various bus transactions. It is described in the QorIQ LS1043A Security (SEC) Reference Manual. In the QorIQ LS1043A Data Path Acceleration Architecture (DPAA) Reference Manual you can find how DPAA uses ICID.
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Have a great day,
If ICID for master is not configurable in the SCFG then you should look in corresponding document which describes block with that master. For example the SEC DMA can be configured to assert specified ICID values for various bus transactions. It is described in the QorIQ LS1043A Security (SEC) Reference Manual. In the QorIQ LS1043A Data Path Acceleration Architecture (DPAA) Reference Manual you can find how DPAA uses ICID.
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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