LS1043A WDOGx_ WRSR is unable to properly determine restart issues

[jack_huang1]

Dears；

       1. We use demo board to find watchdog reset reason, we find WDOGx_WRSR in ls1043arm but can not get right value, follow the operation:

       In uboot, control watchdog1, write 2AD_0000 (Watchdog Control Register (WDOG1_WCR) 16 R/W 0030h 37.5.1/2486) to enable WDOG1

mw.w 2ad0000 3400 1

then we read WDOG1_WRSR

md.w 2ad0004 1

02ad0004: 1000

Disaply 1000

Then we exute reset

we read WDOG1_WRSR also 1000

 2. We get that the RESET_REQ_B assertion should be properly handled, how can we ensure this?

        please check. Thank you!

     Best Regards!

[yipingwang]

Which demo board is used?
For LS1043AQDS board, seems RESET_REQ_B result in the assertion of PORESET_B, so WRSR showed the default value,
and you can check reset reason by reading cpld register on LS1043AQDS board as below which shows
"0110: RESET_REQ_B assertion (from processor) was asserted.":

=> md.b 7fb00042 1
7fb00042: 06

For LS1043ARDB board, the reason may be similar(no obvious description was found in Board Reference Manual), but no cpld registers describe the info above.

[jack2___]

How to know RESET_REQ_B is asserted to PORESET_B or HRESET_B?

Is the hardware pins PORESET_B connect to RESET_REQ_B? If we want to use the ls1043,how can we design？

[jack_huang1]

RESET_REQ_B is an internal block request that asserts HRESET_B or PORESET_B. In your case, it is asserting PORESET_B, which resets the register to its default or initial state. If you want to see the source of the output reset assertion in WDOGx_WRSR, connect your RESET_REQ_B to HRESET_B.

[jack2___]

Don't say such ambiguous words, is it a direct hardware connection or a software configuration connection? Speak more clearly, do you know?

[jack_huang1]

Dear；

        Have been solved. Thank you！