Dear NXP,
I have a question about "shall I do any setting on SERDES Lane B?"
HW Condition as below:
We have a custom designed board based on the LS1043A, which has a Marvell 88e6141 switch connected to SerDes lane B and EMI1.
The SerDes configuration is 0x2255.
Solved! Go to Solution.
No additional configuration settings for SerDes are needed considering that correct RCW and SerDes reference clock are applied.
No additional configuration settings for SerDes are needed considering that correct RCW and SerDes reference clock are applied.