looking at the Reference manual chapter 13.3.16 Reset Control Word Status Register n : RCW is at register 0x1EE_0100 to 0x1EE_013C
=> md.b 1ee0100 40
01ee0100: 06 0d 00 0c 0c 00 00 00 00 00 00 00 00 00 00 00 ................
01ee0110: 35 58 00 02 00 00 80 1a 40 04 40 00 61 00 20 00 5X......@.@.a. .
01ee0120: 00 00 00 00 11 10 01 01 00 00 00 00 00 03 8f fd ................
01ee0130: 20 00 45 00 00 06 10 00 00 00 00 96 00 00 00 01 .E.............
Shown as bytes to have endianness match my previous capture
So you can access each byte directly by calculated register address,
You can check code of u-Boot: arch/arm/cpu/armv8/fsl-layerscape/cpu.c function print_cpuinfo()
/*
* Display the RCW, so that no one gets confused as to what RCW
* we're actually using for this boot.
*/
puts("Reset Configuration Word (RCW):");
for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
rcw = gur_in32(&gur->rcwsr[i]);
if ((i % 4) == 0)
printf("\n %08x:", i * 4);
printf(" %08x", rcw);
}
puts("\n");
looking at the Reference manual chapter 13.3.16 Reset Control Word Status Register n : RCW is at register 0x1EE_0100 to 0x1EE_013C
=> md.b 1ee0100 40
01ee0100: 06 0d 00 0c 0c 00 00 00 00 00 00 00 00 00 00 00 ................
01ee0110: 35 58 00 02 00 00 80 1a 40 04 40 00 61 00 20 00 5X......@.@.a. .
01ee0120: 00 00 00 00 11 10 01 01 00 00 00 00 00 03 8f fd ................
01ee0130: 20 00 45 00 00 06 10 00 00 00 00 96 00 00 00 01 .E.............
Shown as bytes to have endianness match my previous capture
So you can access each byte directly by calculated register address,
You can check code of u-Boot: arch/arm/cpu/armv8/fsl-layerscape/cpu.c function print_cpuinfo()
/*
* Display the RCW, so that no one gets confused as to what RCW
* we're actually using for this boot.
*/
puts("Reset Configuration Word (RCW):");
for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
rcw = gur_in32(&gur->rcwsr[i]);
if ((i % 4) == 0)
printf("\n %08x:", i * 4);
printf(" %08x", rcw);
}
puts("\n");
In U-Boot it is simple, when you boot this is always printed on UART serial port, example :
U-Boot 2020.12 Local build 1.0-dirty (Mar 21 2022 - 15:41:43 +0100)
SoC: LS1043AE Rev1.1 (0x87920211)
Clock Configuration:
CPU0(A53):1200 MHz CPU1(A53):1200 MHz CPU2(A53):1200 MHz
CPU3(A53):1200 MHz
Bus: 300 MHz DDR: 1300 MT/s FMAN: 400 MHz
Reset Configuration Word (RCW):
00000000: 060d000c 0c000000 00000000 00000000
00000010: 35580002 0000801a 40244000 61002000
00000020: 00000000 11100101 00000000 00038ffd
00000030: 00004504 00061000 00000096 00000001