Communication between two LS1021A malfunction due to USB xHCI endpoint state halted

yzhu12 · ‎03-08-2023

Dear NXP experts,

Our design has two LS1021A whose inter-communication is done through USB 3.0 in a single board. However, with some possibility, USB 3.0 has come to a state of xHCI endpoint state halted. In terms of hardware, we checked USB 3.0 Tx/Rx differential pairs, will upload waveform if needed, but its min amplitude satisfy the requirement as we see. Second, we checked USB_SXVDD, USB_SPVDD, USB_SDVDD (1.0V) and USB_HVDD (3.3V) power rails, and output voltage and voltage ripples turns out to be fine. The halted problem arise with a possibility during one day time.

And we believe the clock source is from within. Thus, right now we do not have a clear clue right now.

Hope you guys can share some thoughts on this. Thanks.

Regards,

Yuanchen

yzhu12 · ‎04-16-2023

Hello there. Sorry for the delay.

The phenomenon is a bit different now. We still have a USB communication problem which happens with a possibility and certain environment. Can we create a case to keep our schematics credential?

Regards,

Yuanchen

yipingwang · ‎03-09-2023

Can you share your schematics with us? How do you configure these two LS1021a USBs? I assume that one of these USB is configured as a USB device. What type of USB device did you configure this USB to? Can you share your log to show the failures?