CodeWarrior TAP runs indefinitely when accessing certain registers

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CodeWarrior TAP runs indefinitely when accessing certain registers

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875 次查看
jeremy_henderso
Contributor I

I'm using an LS1021A TWR dev board and every time my code reads from 0x350071C or 0x340071C the TAP device runs in definitely, pressing the pause button in CodeWarrior results in the following error message:

Target request failed: CCSProtocolPlugin: Failed to stop process.

This seems to occur when accessing 0x3500000 and 0x3400000 also.

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786 次查看
Pavel
NXP Employee
NXP Employee

See the Table 32-2 of the LS1021a Reference Manual.

It looks like that PCIe2 is not enabled in your RCW.

Have a great day,
Pavel Chubakov

 

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786 次查看
Pavel
NXP Employee
NXP Employee

Sorry.

See SerDes Chapter.

See the Table 33-2 in the LS1021a Reference Manual Rev 3.

Have a great day,
Pavel Chubakov

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786 次查看
jeremy_henderso
Contributor I

Thank you, re-flashing the RCW appears to have fixed the issue.

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787 次查看
Pavel
NXP Employee
NXP Employee

See the Table 32-2 of the LS1021a Reference Manual.

It looks like that PCIe2 is not enabled in your RCW.

Have a great day,
Pavel Chubakov

 

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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786 次查看
jeremy_henderso
Contributor I

Hi Pavel, 

Table 32-2 refers to OOB timing specifications for the SATA interface, is this the correct table number? I'm not seeing PCIe enable bits in the RCW settings either.

I'm also seeing a similar issue when enabling the MMU and Cache with the following code:

 __asm__ __volatile__ (
 "mrc p15, 0, r0, c1, c0, 0;" /* Read SCTLR into R0 */
 "orr r0, r0, #0x4;" /* Set C bit (bit 2) in SCTLR value */
 "orr r0, r0, #0x1000;" /* Set I bit (bit 12) in SCTLR value */
 "orr r0, r0, #0x1;" /* Set M bit (bit 0) in SCTLR value */
 "mcr p15, 0, r0, c1, c0, 0;" /* Write configuration to SCTLR register */
 );

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