UART and DMA

[lpcware]

Content originally posted in LPCWare by madis on Fri Nov 01 15:58:30 MST 2013
Hello!

I have question regarding UART and DMA operation.

In my project I need to receive variable length packets over the UART. As there is rather heavy computing involved and packet/data rate is quite high, I decided to use DMA for data reception.

I checked from the LPC17xx manual that UART is able to detect character receive timeout in FIFO mode. Designed to fire the interrupt in case end of the packet does not fill up the FIFO up to the trigger level. Reasonable.

Is there any possibility to use the same interrupt schema while using DMA? Like I set up DMA to receive maximum number of bytes expected from UART (maximum packet length) and in case of not that many bytes arrive (inter character timeout), interrupt will fire? It seems for me now that DMA will wait for the exact amount of bytes it was programmed to, it does not seem to care if there is huge timeout between shorter packets... Any idea how to implement character timeout with DMA?

BR, Madis

[lpcware]

Content originally posted in LPCWare by Ramana on Tue Nov 12 21:39:04 MST 2013
Hi,
Even it is timeout or RxTriggerLevel interrupt, only interrupt will be raised from UART, so DMA will serve it surely. I have not checked timout interrupt with UART using DMA, but I have checking it with SSP. Configure DMA for maximum terminal count, and in timeout check terminal count or destination address registers of DMA to know how many number of bytes are recevied in UART.

[lpcware]

Content originally posted in LPCWare by MikeSimmonds on Tue Nov 12 09:51:30 MST 2013
Hi, this may not be how you want or need to handle your serial input, but it works for my environment.

I set up my serial ports to use dma programmed for a fairly large circular buffer. 256 or 512 bytes if memory serves.
That way, no matter what else is going on -- interrupts, heavy bursts of activity, etc. -- the *hardware* keeps
on receiving and only needs to service a comms interrupt once each time the buffer wraps.

In my 'main loop' I poll the hardware buffer as an when convenient or necessary. Obviously, you will need to
use some sort of protocol with your serial messages so you can detect the beginning and end of (or length of)
individual messages. [Note: this polling will involve reading both the current 'dma pointer' and a code maintained
variable as to the last point in the buffer that you have read.]

I amd sorry that I cannot share code examples, but I am working for a commercial project.

Food for thought perhaps. Cheers, Mike.

[lpcware]

Content originally posted in LPCWare by madis on Sat Nov 02 03:25:53 MST 2013
Thank you for your answer.

I though also about implementing "watchdog" with separate timer. First idea I got was something like: rx first byte with no DMA, then start dma and timer (with timeout lets say 16 bytes transfer). So DMA will be operating, copying data and timer int triggers every 16 byte. If DMA has received data (transfer count should be changing, I guess) just re-arm the timer. Timer service would be quite easy and fast (compared to using FIFO and copying data).
But your idea is even better. If can use capture then does not need to service int-s at all probably.
It would be possible to let kernel interrupt (systick) to observe DMA operation. But then different devices receiving same packets detect packet end differently (as systick is not in sync).
So I will start playing with timer also.

Br, Madis

[lpcware]

Content originally posted in LPCWare by rocketdawg on Fri Nov 01 16:34:14 MST 2013
I have been thinking about this as well.
I have been considering using a timer and connecting a capture input to the UART RX pin.
theory is that, if there there is data on the RX pin then the capture pin sees that data as well.
if there is a period of timer where there is not data, then fire an interrupt which terminates the RX DMA.
Have not worked it out completely so I have no code to share.