Hi everybody, i've got a huge problem!
Previously, i've developed a project which involped LPC55S69-EVK and OM-SE05ARD-E.
Everything seemsed to be alright and i started to make porting to a custom PCB developed with a LPC5506.
The porting works, the I2C with Secure element is going well and all the periphals are working good.
There is an issue, when i perform a power cycle (power off-on) all the data saved in flash are erased and it's like i've never upload the firmware inside the MCU.
The flash was set correctly (starting from 0x00000000), even the RAM (starting from 0x20000000) in according to the documentation.
I don't undertand if is an ISP problem (via hardware).
Any suggestion?
Regards
Hello @WorkerEmbedded
How about just program a simple demo, like led? Then perform a power cycle, check whether flash are erased?
BR
Alice
Yes, i've already tried but nothin, same result.
This are the log:
[...]
Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.
Content of CoreSight Debug ROM(s):
RBASE E00FE000: CID B105100D PID 0000095000 ROM (type 0x1)
ROM 1 E00FF000: CID B105100D PID 04000BB4C9 ROM (type 0x1)
ROM 2 E000E000: CID B105900D PID 04000BBD21 CSt ARM ARMv8-M type 0x0 Misc - Undefined
ROM 2 E0001000: CID B105900D PID 04000BBD21 CSt ARM DWTv2 type 0x0 Misc - Undefined
ROM 2 E0002000: CID B105900D PID 04000BBD21 CSt ARM FPBv2 type 0x0 Misc - Undefined
ROM 2 E0000000: CID B105900D PID 04000BBD21 CSt ARM ITMv2 type 0x43 Trace Source - Bus
ROM 1 E0040000: CID B105900D PID 04000BBD21 CSt type 0x11 Trace Sink - TPIU
NXP: LPC5506
DAP stride is 1024 bytes (256 words)
Inspected v.2 On chip Flash memory using IAP lib LPC550x.cfx
Image 'LPC550x Dec 12 2023 17:11:31'
Opening flash driver LPC550x.cfx
VECTRESET requested, but not supported on ARMv8-M CPUs. Using SOFTRESET instead.
Using SOFT reset to run the flash driver
Flash variant 'LPC550x (244KB)' detected (244KB = 488*512 at 0x0)
Closing flash driver LPC550x.cfx
Connected: was_reset=true. was_stopped=false
Awaiting telnet connection to port 3330 ...
GDB nonstop mode enabled
Opening flash driver LPC550x.cfx (already resident)
VECTRESET requested, but not supported on ARMv8-M CPUs. Using SOFTRESET instead.
Using SOFT reset to run the flash driver
Flash variant 'LPC550x (244KB)' detected (244KB = 488*512 at 0x0)
Writing 12708 bytes to address 0x00000000 in Flash
Sectors written: 0, unchanged: 25, total: 25
Erased/Wrote sector 0-24 with 12708 bytes in 42msec
Closing flash driver LPC550x.cfx
Flash Write Done
Flash Program Summary: 12708 bytes in 0.04 seconds (295.48 KB/sec)
Starting execution using system reset and halt target with a stall address
Retask read watchpoint 1 at 0x50000040 to use for boot ROM stall
state - running or following reset request - re-read of state failed - rc Nn(05). Wire ACK Fault in DAP access
state - running or following reset request - re-read of state failed - rc Nn(05). Wire ACK Fault in DAP access
Warning - processor did not halt - gave up waiting
flash - system reset failed - Ep(04). Cannot halt processor.
Target error from Commit Flash write: Ep(04). Cannot halt processor.
GDB stub (C:\nxp\LinkServer_1.4.85\binaries\crt_emu_cm_redlink) terminating - GDB protocol problem: Pipe has been closed by GDB.
state - running or following reset request - re-read of state failed - rc Nn(05). Wire ACK Fault in DAP access
I've already tried to modify reset handling in debug configuration, the demo start but is not persistent in flash and the bootloader cannot upload it after a power cycle
Hello @WorkerEmbedded
"the bootloader cannot upload it after a power cycle"
->> The bootloader mean BOOT ROM or your own second bootloader?
How about refer to schematic to check your hardware?
BR
Alice
Hello @WorkerEmbedded
You can check memory detail as below:
Or linker files and .map file:
While, if you use SDK demo, the default memory is Flash.
Also please check the part number in project is the same with your chip.
BR
Alice