MCUXpresso 11.3.0 SWO Trace Configure unable to read clock from Core1 of LPC55S69

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MCUXpresso 11.3.0 SWO Trace Configure unable to read clock from Core1 of LPC55S69

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mingisun
Contributor II

I am not able to use SWO Trace Config on MCUXpresso 11.3.0 to detect Core-1 of LPC55S69.  I am using the multicore example Hellow World of SDK 2.9.1.  The pin and clock of both project are enabled and configured.

I can only detect the clock of Core-0.  And the SWO Profile start successfully show without problem.

When try to detect Clock of Core-1 the Config failed with "unable to read clock speed from target".  If I manually enter 150000000 hz in it. starting the SWO Profile on Core-1 will show error "Failed to configure the probe for SWO - may not be supported for with firmware".

Is there any step missing when setting up SWO pin/clock or other things for connecting to Core-1 for profiling?

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fincherdavid
Contributor I

I wish there would be more open solutions for SWO and trace on ARM Cortex-M. It seems to me that these features are only rarely used (not sure why?), the same time providing good support for it (configuration, getting/collecting data, visualize it) is a high effort. Which only some silicon vendors are willing to fund. With the MCUXpresso IDE I don’t feel looked in (it is free-of-charge, unlimited, and the only string attached is that it is for NXP devices only). We are using NXP devices anyway for most of our projects, the silicon is reasonable priced, and the superior MCUXpresso IDE makes it a logical choice we cannot complain about.
As for a vendor neutral solution: I’m using Sigrok

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Ming,

Can you give more information about the remark:"When try to detect Clock of Core-1 the Config failed with "unable to read clock speed from target". If I manually enter 150000000 hz in it. starting the SWO Profile on Core-1 will show error "Failed to configure the probe for SWO - may not be supported for with firmware"?

I have checked the LPC55S69-EVK board, the PIO0-10 is used as a SWO pin.  So you can use the code to configure the P0_10 as SWO and configure the ITM clock.

void SWOConfig(void)
{
volatile unsigned int *TRACECLKDIV = (unsigned int *) 0x40000304;
volatile unsigned int *SYSAHBCLKCTRLSET = (unsigned int *) 0x40000220;
//enable CONIO clock
CLOCK_EnableClock(kCLOCK_Iocon);
//configure the SWO pin
IOCON_PinMuxSet(IOCON, 0, 10, IOCON_MODE_INACT | IOCON_FUNC6 |IOCON_DIGITAL_EN | IOCON_INPFILT_OFF);
//enable the trace clock
// Write 0x00000000 to TRACECLKDIV / Trace divider
*TRACECLKDIV = 0;

}

Do you mean that it is okay if you execute above by CPU0, but not okay if you execute above code by cpu1?

BR

XiangJun Rong

1,364件の閲覧回数
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

If you have the cpu1 run the following code, and run PRINTF(), is it okay?

BR

XiangJun Rong

void SWOConfig(void)
{
volatile unsigned int *TRACECLKDIV = (unsigned int *) 0x40000304;
volatile unsigned int *SYSAHBCLKCTRLSET = (unsigned int *) 0x40000220;
//enable CONIO clock
CLOCK_EnableClock(kCLOCK_Iocon);
//configure the SWO pin
IOCON_PinMuxSet(IOCON, 0, 10, IOCON_MODE_INACT | IOCON_FUNC6 |IOCON_DIGITAL_EN | IOCON_INPFILT_OFF);
//enable the trace clock
// Write 0x00000000 to TRACECLKDIV / Trace divider
*TRACECLKDIV = 0;

}

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mingisun
Contributor II

Core-1 can PRINTF() with or without running the SWOConfig().  The SWO pin and clock is actually enabled and configured by the Core-0 code.  BTW, PRINTF() is using SWD (SWDIO pin) so SWO does not matter for PRINTF().

SWO trace and profile is using ITM through SWO pin.  I just can't find from User Manual about Core-1 supports ITM or not.  If you can help me to confirm with the LPC55S59 product team about Core-1 is without ITM (thus no SWO trace and profile for Core-1), then we can close this case.

Thanks!

Ming

1,382件の閲覧回数
mingisun
Contributor II

Hi,

I used the MCUXpresso IDE PIN TOOL and CLOCK TOOL to set up PIO0-10 as SWO and TRACECLKDIV to 1.  With that setting, debugging the dual core Hello World sample code running, for "Core-0" I can use the SWO Trace Config to detect clock and set SWO link speed to 9.75Mbits/s.  SWO Profile can also see activity happened on Core-0.  But if I choose Core-0, then SWO Trace Config is not able to detect the clock at all.  Even when I manually enter the 150MHz clock in the config for Core-1, starting SWO Trace will leads to probe not able to connect to target.

I did search on Internet and found in the following link https://mcuoneclipse.com/2019/12/16/investigating-arm-cortex-m33-core-nxp-lpc55s69-has-two-m33-cores...

That says:
You’ll remember that when ARM launch a processor core it will have a number of optional features. This is shown very clearly on the LPC55S69. The 150 MHz primary core – cpu0 – is a full implementation of Cortex® M33 and includes the optional components FPU, MPU, DSP, ITM and the TrustZone® features.

The secondary core cpu1 also operates at up to 150 MHz, however it is a more simple implementation of the Cortex® M33. In fact it does not have any of the optional features and so does NOT support TrustZone®.

Can you confirm for me that Core-1 of LPC55S69 does not have ITM thus the SWO profile won't work with Core-1?

Thanks!

Ming