LPC55S69 power-down mode and USB FS

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LPC55S69 power-down mode and USB FS

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scottm
Senior Contributor II

I'm working on a low-power sleep mode for a board based on the LPC55S69 and I'm having a hard time getting it down to the expected power consumption level - based on the datasheets for the MCU and peripherals I'm expecting to be able to hit 100 uA or better but I'm having a hard time getting it below 500 uA.

I'm using the provided power control API, as per the manual, and I'm placing it into power down mode with full RAM retention (I'll pare that down later) with nothing excluded from shutdown except kPDRUNCFG_PD_LDOMEM. Wakeup is from GINT0, configured to use a single PINT.

I'm finding that putting a 100k pull-down on the USB FS interface's DP pin reduces power consumption by upwards of 100 uA. This is with no USB device connected. I don't see anything in the manual about additional shutdown steps required for the USB FS peripheral. Am I missing something?

Also as a bit of documentation feedback, table 323 lists WAKEUP_GPIO_GLOBALINT0/1 as wakeup interrupt sources. This terminology isn't used anywhere else in the manual - GINT stands for Grouped Interrupt everywhere else. The software documentation seems to be written by a different group and I've noticed they have their own unique interpretation of some nomenclature.

Thanks,

Scott

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scottm
Senior Contributor II

Should I open a trouble ticket for this instead? I've got a product release to get ready for and I need to know that I've got the USB power-down handled properly.

Scott

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Scott,

Regarding your question "I'm finding that putting a 100k pull-down on the USB FS interface's DP pin reduces power consumption by upwards of 100 uA. This is with no USB device connected. I don't see anything in the manual about additional shutdown steps required for the USB FS peripheral. Am I missing something?", in the UM, there is not description why connecting a pull-down resistor on the FSUSB-DP pin can reduce the power consumption by 100uA. I have discussed with other engineer, pls check the PDRUNCFG0 register in debugger and sure that PDEN_USBFSPHY/PDEN_USBHSPHY/PDEN_LDOUSBHS bits are all set to power down all the USB components. If they are all set, I will create a ticket to ask AE team why connecting a pull-down resistor on the FSUSB-DP pin can reduce the power consumption by 100uA.

BR

XiangJun Rong

 

 

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scottm
Senior Contributor II

scottm_0-1691166197766.png

I'm not using the LPC55S69's sleep mode - as I said above I'm using power down mode. As I understand it, all of the clocks should be disabled.

My main question right now is why it makes more than a 100 uA difference when I add a 100k pull-down to USB FS DP. Is there some other shutdown I need to be performing on the USB FS peripheral?

Scott

 

 

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Pls refer to section 6.1.1 Termination of unused pins in data sheet of LPC5569, in power down mode, the I/O logic can not maintain, I suggest you connect a pull-down resistor for each I/O pin.

Hope it can help you

BR

XiangJun Rong

6.1.1 Termination of unused pins
Table 4 shows how to terminate pins that are not used in the application. In many cases,
unused pins should be connected externally or configured correctly by software to
minimize the overall power consumption of the part.
Unused pins with GPIO function should be configured as outputs set to LOW with their
internal pull-up disabled. To configure a GPIO pin as output and drive it LOW, select the
GPIO function in the IOCON register, select output in the GPIO DIR register, and write a 0
to the GPIO PORT register for that pin. Disable the pull-up in the pin’s IOCON register.
In addition, it is recommended to configure all GPIO pins that are not bonded out on
smaller packages as outputs driven LOW with their internal pull-up disabled.

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scottm
Senior Contributor II

USB0_DP and USB0_DM are not GPIOs. They're part of the USB PHY.

I can see some power-down registers for the USB1 high-speed PHY but I don't see anything corresponding in the USB0 FS PHY documentation.

If you're saying the USB differential pins need pull-downs, please point me to the appropriate documentation so I know what values to use.

Scott

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

This is the current spec in sleep mode for LPC55S69 copied from data sheet which can be downloaded from the website:

https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mc...

 

xiangjun_rong_0-1691137636001.png

As you can see that the current spec is dependent on the clock frequency, when the cclk is 12MHz, PLL is disabled, the current spec is 700uA.

Regarding the signal WAKEUP_GPIO_GLOBALINT0/1, as the following Table 323 I copied from UM11126.pdf, you are right.

The WAKEUP_GPIO_GLOBALINT0 is signal GINT0.

The WAKEUP_GPIO_GLOBALINT1 is signal GINT1.

For detailed inf, pls refer to Chapter 21: LPC55S6x/LPC55S2x/LPC552x:Group GPIO Input Interrupt (GINT0/1)

 

xiangjun_rong_1-1691138124567.png

Hope it is helpful

BR

XiangJun Rong

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