LPC55S28JEV98Y reboot (reset requested by ARM CPU) during ESD test

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LPC55S28JEV98Y reboot (reset requested by ARM CPU) during ESD test

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LarryJWLai
Contributor I

Hi Everyone:

                     I am using LPC55S28JEV98Y microcontroller. The device will reboot during ESD (Air : 8KV ,discharged to GND)  test ( test with customer image). Check the register shows the reset requested by ARM CPU (shows in attached filed). But, test with FTM firmware, it is no reboot issue (Air : 15KV , discharged to GND). Does anyone know what the reason will cause ARM CPU requested reset. Is any MCU firmware setting different between FTM firmware and Customer image will cause the ARM CPU requested reset during ESD test?    

 

 

 

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Regarding the system reset during the ESD test, I suppose that the system reset can not been generated automatically, the system reset code must have been executed somewhere.

For example, the ESD triggers a hardfault  interrupt, the core executes ISR of exception, the ISR includes the system reset code.

Pls check all the ISR

But this is my guess.

Hope it can provide a clue

 

BR

XiangJun Rong

__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
__DSB(); /* Ensure all outstanding memory accesses included
buffered write are completed before reset */
SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
__DSB(); /* Ensure completion of memory access */

for(;;) /* wait until reset */
{
__NOP();
}
}

Hope it can help you

BR

XiangJun Rong

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LarryJWLai
Contributor I

Hi, Thanks for your reply. We will to try it. Thanks.

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