LPC5410xx secondary bootloader release optimisation

Showing results for 
Search instead for 
Did you mean: 

LPC5410xx secondary bootloader release optimisation

Contributor III

I am trying to make secondary bootloader as small as possible. Therefore enabling code optimisation in the release configuration. 

Bootloader works fine in the debug and Level0 optimisation in the release, but as soon as I enable optimisation it doesnt work anymore. It seems like jumping is not really jumping on the right location. Or re-assigning of the vector is not working. Anyway I dont know how to debug this.

Verification of the flash memory proves that application is loaded correctly to the specified location. So, issue seems to be within the jump procedure.

   volatile static uint32_t USER_FLASH_START = 0x2000; 
   static void boot_jump (uint32_t address) {     
      asm (" LDR SP, [R0]");   //load new stack pointer address     
      asm (" LDR PC, [R0, #4]");//load new program counter address 
   void bootSystem (void) {     
      SCB->VTOR = USER_FLASH_START & 0x1FFFFF80;     

Any ideas ?

Labels (1)
0 Kudos
2 Replies

NXP TechSupport
NXP TechSupport

Hi, Sven,

If the bootloader works fine if you do not use optimization, it is okay. Because the bootloader code is written manually, it is efficient, I do not suggest you optimize it.


XiangJun Rong

0 Kudos

Senior Contributor V

Are you sure that this is where the problem is?

Anyway, generate the assembler listing for both optimisation levels, and compare:

Creating Disassembly Listings with GNU Tools and Eclipse | MCU on Eclipse 

0 Kudos